LPC47M112 SMSC Corporation, LPC47M112 Datasheet - Page 6

• Manufacturer Part Number: LPC47M112
• Description: ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE
• Manufacturer: SMSC Corporation

Enhanced Super I/O Controller with LPC Interface
Datasheet
List of Tables
Table 1 - Super I/O Block Addresses ...........................................................................................................................21
Table 2 - Status, Data and Control Registers...............................................................................................................26
Table 3 - Tape Select Bits.............................................................................................................................................30
Table 4 - Internal 2 Drive Decode - Normal ...................................................................................................................30
Table 5 - Internal 2 Drive Decode - Drives 0 and 1 Swapped ........................................................................................31
Table 6 - Drive Type ID.................................................................................................................................................31
Table 7 - Precompensation Delays ..............................................................................................................................32
Table 8 - Data Rates ....................................................................................................................................................32
Table 9 - DRVDEN Mapping ........................................................................................................................................33
Table 10 - Default Precompensation Delays ................................................................................................................33
Table 11 - FIFO Service Delay......................................................................................................................................35
Table 12 - Status Register 0 .........................................................................................................................................37
Table 13 - Status Register 1 .........................................................................................................................................38
Table 14 - Status Register 2 ........................................................................................................................................38
Table 15 - Status Register 3 ........................................................................................................................................39
Table 16 – Description of Command Controls .............................................................................................................42
Table 17 - Instruction Set .............................................................................................................................................45
Table 18 - Sector Sizes ................................................................................................................................................54
Table 19 - Effects of MT and N Bits ..............................................................................................................................54
Table 20 - Skip Bit vs Read Data Command.................................................................................................................54
Table 21 - Skip Bit vs. Read Deleted Data Command ...................................................................................................55
Table 22 - Result Phase...............................................................................................................................................56
Table 23 - Verify Command Result Phase ....................................................................................................................57
Table 24 - Typical Values for Formatting.......................................................................................................................58
Table 25 - Interrupt Identification..................................................................................................................................59
Table 26 - Drive Control Delays (ms) ............................................................................................................................60
Table 27 - Effects of WGATE and GAP Bits..................................................................................................................63
Table 28 - Addressing the Serial Port ..........................................................................................................................64
Table 29 - Interrupt Control ..........................................................................................................................................66
Table 30 - Baud Rates..................................................................................................................................................72
Table 31 - Reset Function ............................................................................................................................................74
Table 32 - Register Summary for an Individual UART Channel ...................................................................................74
Table 33 - MPU-401 Host Interface Registers .............................................................................................................79
Table 34 - MIDI Data Port ............................................................................................................................................79
Table 35 - MPU-401 Status Port ..................................................................................................................................80
Table 36 - MIDI Receive Buffer Empty Status Bit.........................................................................................................80
Table 37 - MIDI Transmit Busy Status Bit ....................................................................................................................80
Table 38 – MPU-401 Command Port ...........................................................................................................................81
Table 39 - Parallel Port Connector ...............................................................................................................................85
Table 40 - EPP Pin Descriptions ..................................................................................................................................90
Table 41 - ECP Pin Descriptions...................................................................................................................................92
Table 42 - ECP Register Definitions..............................................................................................................................93
Table 43 - Mode Descriptions .......................................................................................................................................93
Table 44A - Extended Control Register.........................................................................................................................96
Table 45 -Forward Channel Commands (HostAck Low) ..............................................................................................99
Table 46 - PC/AT and PS/2 Available Registers ........................................................................................................103
Table 47 – State of System Pins in Auto Powerdown..................................................................................................103
Table 48 - State of Floppy Disk Drive Interface Pins in Powerdown ..........................................................................103
Table 49 - I/O Address Map........................................................................................................................................109
Table 50 - Host Interface Flags ..................................................................................................................................109
Table 51 - Status Register ..........................................................................................................................................112
Table 52 - Resets .......................................................................................................................................................112
Table 53 - General Purpose I/O Port Assignments ....................................................................................................118
Table 54 - GPIO Configuration Summary ..................................................................................................................121
Table 55 - GPIO Read/Write Behavior .......................................................................................................................121
Table 56 – Different Modes for Fan............................................................................................................................129
Table 57 - Runtime Register Block Summary ............................................................................................................136
Table 58 - Runtime Register Description ...................................................................................................................138
SMSC DS – LPC47M112
Page 6
Rev. 02/02/2005
DATASHEET