MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 132

• Manufacturer Part Number: MT92210
• Description: 1023 Channel Voice Over ip (VoIP) Processor
• Manufacturer: Zarlink Semiconductor

132
The chip can also control all the compatibility clocks that must be generated on H.110. There are a good number of
these signals and their generation is independent of the mastership on either A or B: the chip can choose to
generate all of these, or not, whether or not it is bus master or backup. Because these compatibility signals are, by
definition, used to meet the specific requirements of an older bus standard, their generation is not programmable
for the most part.
ct_frame
fr_comp (8M,Strdl)
fr_comp (4M,Strdl)
fr_comp (2M,Strdl)
sclkx2 (8M, inverted)
sclkx2 (4M, inverted)
sclkx2 (2M, inverted)
fr_comp (8M,Last)
fr_comp (4M,Last)
fr_comp (2M,Last)
fr_comp (8M,First)
fr_comp (4M,First)
fr_comp (2M,First)
sclk (8M, inverted)
sclk (4M, inverted)
sclk (2M, inverted)
ct_c8
c16+
c16-
c2
c4
Figure 77 - TDM Bus Timing - Compatibility Clock Generation (other than sclk, sclkx2)
Note: The fr_comp polarity in this drawing is always active low for simplicity. It can also be programmed active high.
sclkx2 (8M)
sclkx2 (4M)
sclkx2 (2M)
ct_frame
sclk (8M)
sclk (4M)
sclk (2M)
ct_frame
ct_c8
ct_c8
Figure 75 - TDM Bus Timing - fr_comp Generation
Figure 76 - TDM Bus Timing - sclkx2 Generation
Zarlink Semiconductor Inc.
: