MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 41

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MT92210

Manufacturer Part Number
MT92210
Description
1023 Channel Voice Over ip (VoIP) Processor
Manufacturer
Zarlink Semiconductor
Datasheet
Data Sheet
The packet’s destination may be one of the TX link packet buffers, the Network CPU packet buffer, or the packet
disassembly module. If the packet’s destination is the packet disassembly module, then the post-search structure
will contain a pointer to a valid RX RTP Connection Structure. The packet is then written into the Packet
Disassembly Memory and read on the other side by the packet disassembly module.
The packet disassembly module reads the RX RTP Connection Structure, and based on the Marker bit and
Payload type of the packet (or its UDP length, if it carries no RTP), it will search in the Payload Byte/Marker Bit table
for the entry number that corresponds to the current packet. The entry number will point to 1 of 16 RX RTP channel
structures, which may be xxPCM Channel Structures, HDLC Channel Structures, CPU Channel Structures or may
indicate to delete the packet.
An RX RTP xxPCM Channel Structure will contain pointers to one or many circular buffers in which its PCM data
will be written, depending on how many bearers it carries. It will also contain a pointer to an RTP Common PDV
Absorption Structure, which will be used to do de-jittering on the bearer’s payload. Many xxPCM Channels can
share the same Common PDV Absorption Structure, which allows them to be de-jittered in common and ensures
that a slip on one will force a slip on all.
If the selected channel structure is an RX HDLC Channel Structure, then it will contain a pointer to an RX HDLC
Stream/Buffer Control Structure, which will itself point to a circular buffer. In HDLC, channels are policed
independently, but are then merged into a common circular buffer for the entire stream. The RX HDLC
Stream/Buffer Control Structure will contain the base address as well as the read and write pointers to this circular
buffer.
If the selected channel structure is an RX CPU Channel Structure, it will contain a pointer to an RX CPU Buffer
Control Structure. Except for the fact that the CPU Channel Structure will not request HDLC framing to be
Table (1
subnet)
logical
Flow
RX RTP Connection
Structure Base Address
ID0
per
Packet Parsing: Reads through the headers of the packet, finds protocol errors, extracts the headers that
will be used to form the identification key based on the packet type.
Identification Key CRC + hashing: Applies a mask to the identification key, then performs a CRC on it,
and annexes the profile number to obtain a 60-bit key.
Binary Tree Search: Searches for the identification key in the binary tree. If it succeeds, returns a pointer
to a Post-Search Confirmation Structure. If it fails, the Profile Default Structure will be consulted.
Post-Search Process: Compares the packet’s headers to those in the post-search confirmation structure.
Also checks if the packet passes the flow table look-up. If the packet fails, it will use the profile default
structure to establish its destination. The destination may be back to the packet identifier (in the case of a
header, i.e. MPLS, MPOA, ELAN-ID) or back to the Identification Key CRC + hashing process, if the
established destination is to route using another profile.
IP Address
Index
(points to an
entry in the
Flow Table)
Post-Search
Process
connection or
Confirmation
Post-Search
Structure (1
header) ID2
If the post-search process decides to search for the
packet in the binary tree using another profile
per
Structure (1 per
Profile Default
Post-Search
profile) ID2
First Post-
Search
Confirmation
Structure
Address
Binary Tree
(global) ID6
Binary Tree
RTP Data
Search
Zarlink Semiconductor Inc.
Figure 17 - Rx Flow 2
Memory Entry
Mask) (1 per
Profile) ID1
(Hash Key
Profile
Identification
Key CRC +
hashing
Initial Default
Post-Search
Structure (1
per packet
type) ID2
Identifi-
cation
Key (pre-
CRC)
If the initial search was for an MPLS label, MPOA
tag or ELAN ID, and the result is valid, then the
packet will be parsed again, ignoring that header
Memory
Header
(global)
Next
ID4
Parsing
Packet
(global) ID1
(Option +
Memory
Profile
TOS)
Buffer Handles
(global) NET6
Identification
Packet
MT92210
41

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