MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 26

• Manufacturer Part Number: MT92210
• Description: 1023 Channel Voice Over ip (VoIP) Processor
• Manufacturer: Zarlink Semiconductor

26
Blocks in Queue
Handle Queue
Base Address &
Size
Handle Read
Pointer
Handle Write
Pointer
Service Block Fill
Service Handle Fill
Max Block Fill
+C
+0
+4
+8
Field
b31
b30
b29
internal memory
4000E00h in
b28
b27
Total number of blocks currently contained in queue.
Indicates the base address of the handle queue as well as its size. The minimum queue
size is 2K bytes, which is 128 handles. The maximum size is 256K bytes, which is 16K
handles. The size is indicated by the lowest ‘1’ in the field: for instance, if the field were
xxxxxxxxxx1, this would represent a 2K byte buffer with a base address whose high bits
are xxxxxxxxxx. If the field were xxxxxx10000, this would represent a 32K byte buffer with
a base address whose high bits are xxxxxx.
Pointer within the handle queue indicating the most recently read handle.
Pointer within the handle queue indicating the most recently written handle.
If the Blocks in Queue is less than or equal to this value, a service bit in registers can be
set, indicating that the queue has gone below a certain fill. Both this and the handle fill
must be valid for the service bit to be set.
If the difference between Handle Write Pointer and Handle Read Pointer is less than or
equal to this value, a service bit in registers can be set. Both this and the block fill must
be valid for the service bit to be set.
Indicates how many blocks, at most, the cache may contain before it overflows. This
excludes the packet at the head of the queue, because it has been cached and will be
treated shortly.
b26
b25
Service Handle Fill [13:0]
Handle Read Pointer [14:0]
b24
Service Block Fill [18:2]
b23
Blocks in Queue [18:0]
b22
Table 8 - Handle Queue Descriptor
Handle Queue Descriptors in Packet Handler Memory
b21
Figure 6 - Packet Handler Memory
+10
+20
+30
+40
+50
+60
+70
+0
b20
b19
Zarlink Semiconductor Inc.
b18
Handle Queue Descriptor
Network CPU Packet Buffer
b17
Identification Buffer
Disassembly Buffer
TX Link B HP
TX Link A HP
b16
TX Link A LP
TX Link B LP
Reserved
b15
b14
Description
b13
b12
b11
Max Monitored Block Fill [18:3]
b10
Handle Queue Base Address & Size [20:11]
Handle Write Pointer [14:0]
b9
b8
Max Block Fill [18:6]
b7
b6
b5
b4
b3
b2
b1
b0