MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 132

• Manufacturer Part Number: MT92220BG
• Description: Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
• Manufacturer: Zarlink Semiconductor

132
The format of the RX RTP CPU Channel Structure is the following:
A
B
RX CPU Buffer Index
HFE
Discharge Rate
Maximum Bucket Fill
CBF
Field
+10
+12
+14
+A
+C
+E
+0
+2
+4
+6
+8
b 15
Last Packet Local Time Stamp [7:0]
A
b14
B
Clock Recovery channel A. When this field is set, an Adaptive Clock Recovery RTP
Event Structure using this packet’s sequence number and time stamp fields will be
written to the Adaptive clock recovery queue A.
Clock Recovery channel B. When this field is set, an Adaptive Clock Recovery RTP
Event Structure using this packet’s sequence number and time stamp fields will be
written to the Adaptive clock recovery queue B.
Half Full Interrupt Enable. When ‘1’, if the RX CPU Buffer for this channel is more
than half full, the interrupt_error_alarm will be forced active. This alarm should force
the software to empty out packets in all RX CPU buffers.
Long term rate at which bytes can be received on this RX CPU channel. The current
bucket fill is reduced at this rate. The rate is defined as a number of bytes per frame
that can be sent into the RX CPU buffer. This is a floating point number; it has two
bits of mantissa (excluding the hidden leading ‘1’) and 4 bits of exponent. Zero is not
a legal value. The minimum rate is 4 kbps, which is defined as mantissa = “100” and
exponent = “0001”. So to calculate the rate, the following equation can be used: 4
kbps * (mantissa/8) * (2^exponent).
Up to this many bytes can be contained in the “policing bucket” of this RX CPU
channel before packet discarding takes place. Largest value is 0x0000 (which
means 65536 bytes), smallest value is 0x1 (which means 1 byte).
Current Bucket Fill. Current fill of the “policing bucket” in 1/64th of a byte. This field
should be initialized to all zeros by software.
Index in the RX CPU Buffer Control Table in SSRAM B.
b13
1
Figure 70 - RX RTP CPU Channel Structure
b12
1
Table 54 - Fields and Description
b11
1
Last Packet Local Time Stamp [23:8]
Received Packet Count [15:0]
Received Octet Count [31:16]
Zarlink Semiconductor Inc.
b10
Received Octet Count [15:0]
Maximum Bucket Fill [15:0]
Current Bucket Fill [15:0]
b9
1
Discharge Rate [5:0]
HFE
0x0000
b8
b7
I
RX CPU Buffer Index [8:0]
Description
b6
Current Bucket Fill [21:16]
b5
b4
0x00
b3
0
b2
0
b1
0
b0
0