MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 48

• Manufacturer Part Number: MT92220BG
• Description: Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
• Manufacturer: Zarlink Semiconductor

48
Copy Process
Copy Process
TX Link A
TX Link B
Zarlink Semiconductor Inc.
Used when TX
link A is
Ethernet/POS
TX link A Copy process: Copies packets from external SDRAM to the TX
link A packet/Cell FIFO, when the link is UTOPIA, or to the TX link A Cell
FIFO when the link is Ethernet or POS. Also copies raw cells to the TX link
A Packet/Cell FIFO, only when the link is UTOPIA.
TX link B Copy process: Copies packets from external SDRAM to the TX
link B Cell FIFO. Also copies raw cells to the TX link B Cell FIFO.
Block to Packet Conversion Process: When link A is Ethernet or POS, this
process will convert the blocks read from SDRAM C and written into the TX
link A cell FIFO into contiguous packets which are then written in the TX link
A Packet/Cell FIFO. Also takes care of all Ethernet/POS formatting, such
as removing the LANEv1 header.
Figure 23 - Tx Flow 4
TX link B Cell
FIFO (global)
Used when TX link A is UTOPIA
TX link A Cell
FIFO (global)
Block to Packet
Conversion
Process
FIFO (global)
Packet/Cell
TX link A
To TX link A
To TX link B