PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 123

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PIC16C926-I/CL

Manufacturer Part Number
PIC16C926-I/CL
Description
64/68-Pin CMOS Microcontrollers with LCD Driver
Manufacturer
Microchip Technology
Datasheet
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2001 Microchip Technology Inc.
Before Instruction:
After Instruction:
CNT
Z
CNT
Z
=
=
=
=
Decrement f
[ label ] DECF f [,d]
0
d
(f) - 1
Z
Decrement register ’f’. If ’d’ is 0, the
result is stored in the W register. If ’d’
is 1, the result is stored back in
register ’f’.
1
1
DECF
Decode
Q1
00
0x01
0
0x00
1
f
[0,1]
127
(destination)
register
CNT,
0011
Read
Q2
’f’
1
Process
dfff
data
Q3
destination
Write to
ffff
Q4
Preliminary
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
If Skip: (2nd Cycle)
Before Instruction:
After Instruction:
PC =
CNT
if CNT
PC
if CNT
PC
PIC16C925/926
address HERE
=
=
=
=
Decrement f, Skip if 0
[ label ] DECFSZ f [,d]
0
d
(f) - 1
skip if result = 0
None
The contents of register ’f’ are decre-
mented. If ’d’ is 0, the result is placed
in the W register. If ’d’ is 1, the result
is placed back in register ’f’.
If the result is 1, the next instruction is
executed. If the result is 0, then a NOP
is executed instead, making it a 2T
instruction.
1
1(2)
HERE
CONTINUE •
Operation
Decode
Q1
Q1
CNT - 1
0,
address CONTINUE
0,
address HERE+1
00
No
f
[0,1]
127
(destination);
register ’f’
Operation
DECFSZ
GOTO
1011
Read
Q2
Q2
No
DS39544A-page 121
Operation
Process
dfff
data
Q3
Q3
CNT, 1
LOOP
No
destination
Operation
Write to
ffff
Q4
Q4
No
CY

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