PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 24
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PIC16C926-I/CL
Manufacturer Part Number
PIC16C926-I/CL
Description
64/68-Pin CMOS Microcontrollers with LCD Driver
Manufacturer
Microchip Technology
Datasheet
1.PIC16C926-ICL.pdf
(182 pages)
- Current page: 24 of 182
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PIC16C925/926
2.3.4
This register contains the individual enable bits for the
peripheral interrupts.
REGISTER 2-4:
DS39544A-page 22
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
PIE1 REGISTER
PIE1 REGISTER (ADDRESS 8Ch)
bit 7
LCDIE: LCD Interrupt Enable bit
1 = Enables the LCD interrupt
0 = Disables the LCD interrupt
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
Unimplemented: Read as ‘0’
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Legend:
R = Readable bit
- n = Value at POR
LCDIE
R/W-0
R/W-0
ADIE
Preliminary
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
Note:
SSPIE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
CCP1IE
R/W-0
2001 Microchip Technology Inc.
x = Bit is unknown
TMR2IE
R/W-0
TMR1IE
R/W-0
bit 0
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