PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 61

• Manufacturer Part Number: PIC16C926-I/CL
• Description: 64/68-Pin CMOS Microcontrollers with LCD Driver
• Manufacturer: Microchip Technology

9.0
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The SSP module can
operate in one of two modes:
REGISTER 9-1:
2001 Microchip Technology Inc.
SYNCHRONOUS SERIAL PORT
(SSP) MODULE
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSPSTAT: SERIAL PORT STATUS REGISTER (ADDRESS 94h)
SMP: SPI Data Input Sample Phase bit
SPI Master mode:
1 = Input data sampled at end of data output time
0 = Input data sampled at middle of data output time
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode
CKE: SPI Clock Edge Select bit (see Figure 9-3, Figure 9-4, and Figure 9-5)
CKP = 0:
1 = Data transmitted on rising edge of SCK
0 = Data transmitted on falling edge of SCK
CKP = 1:
1 = Data transmitted on falling edge of SCK
0 = Data transmitted on rising edge of SCK
D/A: Data/Address bit (I
1 = Indicates that the last byte received or transmitted was data
0 = Indicates that the last byte received or transmitted was address
P: STOP bit (I
bit was detected last.)
1 = Indicates that a STOP bit has been detected last (this bit is ’0’ on RESET)
0 = STOP bit was not detected last
S: START bit (I
bit was detected last.)
1 = Indicates that a START bit has been detected last (this bit is ’0’ on RESET)
0 = START bit was not detected last
R/W: Read/Write bit Information (I
This bit holds the R/W bit information following the last address match. This bit is only valid from the
address match to the next START bit, STOP bit, or ACK bit.
1 = Read
0 = Write
UA: Update Address (10-bit I
1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated
BF: Buffer Full Status bit
Receive (SPI and I
1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
Transmit (I
1 = Transmit in progress, SSPBUF is full
0 = Transmit complete, SSPBUF is empty
bit 7
Legend:
R = Readable bit
- n = Value at POR
R/W-0
SMP
2
C mode only)
2
C mode only. This bit is cleared when the SSP module is disabled, or when the START
2
R/W-0
C mode only. This bit is cleared when the SSP module is disabled, or when the STOP
CKE
2
C modes):
2
C mode only)
2
C mode only)
D/A
Preliminary
R-0
W = Writable bit
’1’ = Bit is set
2
C mode only)
R-0
• Serial Peripheral Interface (SPI
• Inter-Integrated Circuit (I
Refer to Application Note AN578, "Use of the SSP
Module in the I
P
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R-0
S
PIC16C925/926
2
C Multi-Master Environment.”
R/W
R-0
2
C
TM
)
x = Bit is unknown
TM
R-0
UA
)
DS39544A-page 59
R-0
BF
bit 0