PIC18F6620 Microchip, PIC18F6620 Datasheet - Page 100

• Manufacturer Part Number: PIC18F6620
• Description: Microcontroller
• Manufacturer: Microchip

PIC18F6520/8520/6620/8620/6720/8720
9.4
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Priority Registers (IPR1, IPR2 and IPR3). The
operation of the priority bits requires that the Interrupt
Priority Enable (IPEN) bit be set.
REGISTER 9-10:
DS39609B-page 98
IPR Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
bit 7
PSPIP: Parallel Slave Port Read/Write Interrupt Priority bit
1 = High priority
0 = Low priority
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
RC1IP: USART1 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX1IP: USART1 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
SSPIP: Master Synchronous Serial Port Interrupt Priority bit
1 = High priority
0 = Low priority
CCP1IP: CCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
- n = Value at POR
PSPIP
R/W-1
Note 1: Enabled only in Microcontroller mode for PIC18F8X20 devices.
(1)
R/W-1
ADIP
RC1IP
R/W-1
W = Writable bit
‘1’ = Bit is set
R/W-1
TX1IP
SSPIP
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
CCP1IP
R/W-1
 2004 Microchip Technology Inc.
x = Bit is unknown
TMR2IP
R/W-1
TMR1IP
R/W-1
bit 0