PIC18F6620 Microchip, PIC18F6620 Datasheet - Page 291

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PIC18F6620

Manufacturer Part Number
PIC18F6620
Description
Microcontroller
Manufacturer
Microchip
Datasheet

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RCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
PC =
PC =
TOS =
Q1
No
PIC18F6520/8520/6620/8620/6720/8720
Address (HERE)
Address (Jump)
Address (HERE+2)
Read literal
Push PC to
operation
Relative Call
[ label ] RCALL
-1024
(PC) + 2
(PC) + 2 + 2n
None
Subroutine call with a jump up to
1K from the current location. First,
return address (PC+2) is pushed
onto the stack. Then, add the 2’s
complement number ‘2n’ to the PC.
Since the PC will have incremented
to fetch the next instruction, the
new address will be PC+2+2n. This
instruction is a two-cycle
instruction.
1
2
HERE
stack
1101
Q2
No
‘n’
n
RCALL
1nnn
1023
TOS,
operation
Process
Data
Q3
No
PC
Jump
n
nnnn
Write to PC
operation
Q4
No
nnnn
RESET
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
After Instruction
Decode
Registers =
Flags*
Q1
=
Reset
[ label ]
None
Reset all registers and flags that
are affected by a MCLR Reset.
All
This instruction provides a way to
execute a MCLR Reset in software.
1
1
RESET
Reset
Start
0000
Q2
Reset Value
Reset Value
RESET
0000
operation
Q3
No
DS39609B-page 289
1111
operation
Q4
No
1111

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