XC2VPX70 Xilinx, XC2VPX70 Datasheet - Page 15

• Manufacturer Part Number: XC2VPX70
• Description: (XC2VPxxx) Platform Flash In-System Programmable Configuration PROMS
• Manufacturer: Xilinx

DS123 (v2.9) May 09, 2006
TMS
TDO
TCK
TDI
R
V
CCJ
V
CCO
V
CCINT
Notes:
1 For Mode pin connections and DONE pin pull-up value, refer to the appropriate FPGA data sheet.
2 For compatible voltages, refer to the appropriate data sheet.
3 In Slave Serial mode, the configuration interface can be clocked by an external oscillator, or
4 For the XCFxxS the CF pin is an output pin. For the XCFxxP the CF pin is a bidirectional pin.
optionally—for the XCFxxP Platform Flash PROM only—the CLKOUT signal can be used to drive the
FPGA's configuration clock (CCLK). If the XCFxxP PROM's CLKOUT signal is used, then CLKOUT must
be tied to a 4.7KΩ resistor pulled up to V
XCFxxP, if CF is not connected to PROGB, then it must be tied to V
V
V
V
TDI
TMS
TCK
GND
CCINT
CCO
CCJ
Platform Flash
PROM
(2)
(2)
External
Oscillator
OE/RESET
(3)
CLK
CF
CEO
TDO
Figure 7: Configuring in Slave Serial Mode
CE
D0
(3)
(4)
V
CCO
(2)
CCO
.
(1)
www.xilinx.com
Platform Flash In-System Programmable Configuration PROMS
DIN
CCLK
DONE
INIT_B
PROG_B
TDI
TMS
TCK
GND
CCO
Xilinx FPGA
Slave Serial
via a 4.7 kΩ pull-up resistor.
MODE PINS
DOUT
TDO
(1)
For the
PROG_B
PROG_B
INIT_B
INIT_B
DONE
DONE
CCLK
CCLK
DIN
DIN
...OPTIONAL
Slave FPGAs
with identical
configurations
...OPTIONAL
Daisy-chained
Slave FPGAs
with different
configurations
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