ISL6534 Intersil Corporation, ISL6534 Datasheet - Page 17

• Manufacturer Part Number: ISL6534
• Description: Dual PWM
• Manufacturer: Intersil Corporation

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Connecting One Input from Another Output
Often, one of the 3 outputs generated is used as the input
voltage to a 2nd (and perhaps 3rd); the general case
includes input or outputs of other IC regulators as well. This
can be done, with a few precautions in mind.
Feedback Compensation
The compensation required for VOUT1 and VOUT2 is similar
to many other switching regulators, and the same tools can
be used to determine their component values. Note that
VOUT1 and VOUT2 are similar with respect to the
compensation; the only difference is their reference voltages
(fixed 0.6V versus REFIN, which does not directly affect the
component values). The schematics show type 3
compensation, but the simpler type 2 is also possible, under
the right conditions. It is recommended to have footprints for
the Type 3, in case it is ever needed; the type 2 is a subset of
that. A simple rule of thumb is that when bulk capacitors are
used on the outputs, the ESR is often high enough (10’s -
100mΩ) to use Type 2 compensation. But if only ceramic
capacitors (ESR ~ 1’s mΩ) are used on the outputs, then
most likely Type 3 will be required. Note that the component
labels match the equations given in this section, but may not
match other diagrams in this datasheet.
Figure 15 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(Vout) is regulated to the Reference voltage level. The error
amplifier (Error Amp) output (V
oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with an amplitude of V
PHASE node. The PWM wave is smoothed by the output filter
(L
1. The first output must be designed and sized for its own
2. The sequencing of the outputs must be consistent. The
3. The output capacitor of the first is now also the input
4. The linear regulator has no short-circuit protection.
O
load current, plus the expected input current of the other
channels.
first output cannot be disabled or have a much slower
SS/EN ramp than the input channel, in order to take full
advantage of the soft-start. If the VIN is not present when
the 2nd regulator tries to start up, that can be interpreted
as a short-circuit, and the whole IC could be shut down.
capacitor of the 2nd, so it needs to be chosen and sized
for both conditions. For example, transients on the first
output show up on the input of the 2nd; and input current
transients on the 2nd can affect the output of the first.
There may also be trade-offs of the placement of the
various capacitors; some might be near the output FETs
of the first, and some near the input FETs of the 2nd.
However, if VIN3 is connected to one of the switcher
outputs, a short on the linear output may be detected; but
it is subject to all the cautions mentioned in the SHORT-
CIRCUIT PROTECTION section.
and C
O
).
17
E/A
) is compared with the
IN
at the
ISL6534
The modulator transfer function is the small-signal transfer
function of Vout/V
Gain and the output filter (L
break frequency at F
the modulator is simply the input voltage (V
peak-to-peak oscillator voltage ∆V
MODULATOR BREAK FREQUENCY EQUATIONS
The compensation network consists of the error amplifier
(internal to the ISL6534) and the impedance networks Z
and Z
a closed loop transfer function with the highest 0dB crossing
frequency (f
is the difference between the closed loop phase at f
180
network’s poles, zeros and gain to the components (R1, R2,
R3, C1, C2, and C3) in Figure 15. Note again that the
component names from Figure 15 apply to the equations
below; they may be labeled with different names elsewhere
in this document. Use these guidelines for locating the poles
and zeros of the compensation network:
FIGURE 15. VOLTAGE-MODE BUCK CONVERTER
∆V
F
o
LC
OSC
. The equations below relate the compensation
FB
=
. The goal of the compensation network is to provide
OSC
-------------------------------------- -
2π
•
0dB
COMPARATOR
COMPENSATION DESIGN
ERROR
AMP
V
L
ISL6534
1
) and adequate phase margin. Phase margin
E/A
O
DETAILED COMPENSATION COMPONENTS
PWM
•
E/A
Z
+
C
-
COMP
+
FB
-
C1
O
LC
. This function is dominated by a DC
REFERENCE
and a zero at F
C2
+
-
O
R2
DRIVER
DRIVER
Z
REF
and C
IN
F
ESR
Z
OSC
FB
FB
O
=
V
), with a double pole
IN
-------------------------------------------- -
2π
.
PHASE
ESR
C3
(PARASITIC)
•
(
Z
IN
ESR C
. The DC Gain of
L
IN
O
R1
) divided by the
1
R3
ESR
C
•
V
O
OUT
O
0dB
)
V
FN9134.1
OUT
and
IN