ISL8105B Intersil Corporation, ISL8105B Datasheet - Page 14

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ISL8105B

Manufacturer Part Number
ISL8105B
Description
Single-Phase Synchronous Buck Converter PWM
Manufacturer
Intersil Corporation
Datasheet

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heatsink may be necessary depending upon MOSFET
power, package type, ambient temperature and air flow.
Where:
D is the duty cycle = V
t
FS is the switching frequency.
When operating with a 12V power supply for V
to a minimum supply voltage of 6.5V), a wide variety of
N-Channel MOSFETs can be used. Check the absolute
maximum V
above the highest V
usually means a 20V V
with a 30V V
(around 1V or below) are not recommended for the reasons
explained in the next paragraph.
For 5V-only operation, given the reduced available gate bias
voltage (5V), logic-level transistors should be used for both
N-MOSFETs. Look for r
should be exercised with devices exhibiting very low
V
present aboard the ISL8105 may be circumvented by these
MOSFETs if they have large parasitic impedances and/or
capacitances that would inhibit the gate of the MOSFET from
being discharged below its threshold level before the
complementary MOSFET is turned on. Also avoid MOSFETs
with excessive switching times; the circuitry is expecting
transitions to occur in under 50ns or so.
BOOTSTRAP Considerations
Figure 12 shows the top-side gate drive (BOOT pin) supplied
by a bootstrap circuit from V
C
LX pin. The supply is refreshed to a voltage of V
boot diode drop (V
turns on. Check that the voltage rating of the capacitor is
above the maximum V
rating should be sufficient for a 12V system. A value of 0.1µF
is typical for many systems driving single MOSFETs.
If V
option is to connect the BOOT pin to 12V and remove the
BOOT cap (although, you may want to add a local cap from
BOOT to GND). This will make the TGATE V
equal to (12V - 5V = 7V). That should be high enough to
SW
Losses while Sinking Current
Losses while Sourcing Current
GS(ON)
BOOT
BIAS
P
P
P
P
P
is the combined switch ON and OFF time, and
TOP
TOP
BOTTOM
TOP
BOTTOM
, develops a floating supply voltage referenced to the
is 12V, but V
characteristics. The shoot-through protection
= Io
=
=
GS
Io
Io
DS
2
= Io
2
2
x r
=
rating for both MOSFETs; it needs to be
×
×
maximum rating). Low threshold transistors
DS(ON)
Io
2
r
r
DS ON
DS ON
D
x r
2
Bias
) each time the lower MOSFET, Q
×
(
(
DS(ON)
IN
r
OUT
BIAS
DS ON
GS
DS(ON)
x D
is lower (such as 5V), then another
)
)
voltage allowed in the system; that
(
×
×
rating (which typically correlates
D
D
/ V
x (1 - D)
voltage in the system. A 16V
BIAS
14
)
+
+
×
IN
1
1
-- - Io
-- - Io
2
2
ratings at 4.5V. Caution
(
,
1 D
. The boot capacitor,
×
×
)
V
V
+
IN
IN
1
-- - Io
2
×
×
t
t
SW
SW
GS
×
BIAS
V
×
×
Bias
IN
voltage
F
F
S
S
×
(or down
t
less the
(EQ. 14)
SW
2
,
×
F
ISL8105B
S
drive most MOSFETs, and low enough to improve the
efficiency slightly. Do NOT leave the BOOT pin open, and try
to get the same effect by driving BOOT through V
the internal diode; this path is not designed for the high
current pulses that will result.
For low V
important, an external BOOT diode (in parallel with the
internal one) may be considered. The external diode drop
has to be lower than the internal one. The resulting higher
V
gain in efficiency should be balanced against the extra cost
and area of the external diode.
For information on the Application circuit, including a
complete Bill-of-Materials and circuit board description, can
be found in Application Note 1288.
G-S
ISL8105B
FIGURE 12. UPPER GATE DRIVE - BOOTSTRAP OPTION
+
-
of the top-side FET will lower its r
+V
BIAS
BIAS
GND
+
-
+V
V
D
voltage applications where efficiency is very
BIAS
LX
BOOT
TGATE
BGATE
C
+1V TO +12V
BOOT
Q
Q
1
2
DS(ON)
V
NOTE:
V
G-S
G-S
. The modest
February 13, 2007
≈V
≈V
BIAS
BIAS
BIAS
FN6447.0
and
- V
D

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