DSP101 Burr-Brown Corporation, DSP101 Datasheet - Page 8

• Manufacturer Part Number: DSP101
• Description: DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS
• Manufacturer: Burr-Brown Corporation

THEORY OF OPERATION
The DSP101 and DSP102 are sampling analog-to-digital
converters optimized for handling dynamic signals. They
have complete logic interface circuitry for ease of use with
standard digital signal processing ICs, and transmit data
words in a serial stream. The successive approximation
conversion architecture is combined with an inherently sam-
pling switched capacitor array to provide maximum user
flexibility over sampling and conversion timing.
The DSP101 and DSP102 are pipelined internally. When the
user gives a convert command at time (t), two actions are
initiated. First, the internal sample/holds are switched to the
hold state, and a conversion cycle is initiated. At the same
time, the DSP101 or DSP102 transmits a synchronization
pulse and starts shifting out the conversion results from the
previous convert command at (t-1) using the system bit
clock. The data from the conversion at time (t) is shifted out
of the converter after the next convert command is received.
Both the DSP101 and the DSP102 are 18-bit A/Ds inter-
nally. When the DSP IC is programmed to accept 16-bit
word lengths, the processor will ignore the last two data bits
transmitted from the DSP101 or DSP102. A Cascade Mode
on the DSP102 can be invoked to transmit data for both
conversion channels over a single serial line as a 32-bit
word. In this mode, the first 16 bits of data transmitted after
the Sync pulse contain data from channel A, followed by 16
bits of information from channel B, allowing a single 32-bit
word to contain data for both channels.
FIGURE 2. DSP101 Basic Operation.
±2.75 Analog Input
®
–5V
DSP101/102
Logic Level Clock Input
NOTES: (1) Leave Unconnected.
(±10%) 74HC
10MHz, 50%
+
(2) Protection from power supply momentary overrange.
10µF
+5V
–5V
+
+
10µF
+
+5V
10
10µF
10µF
2)
(1)
(1)
(1)
10
11
12
13
14
1
2
3
4
5
6
7
8
9
VPOT
VIN
MSB
VOS
VA–
VA+
DGND
DGND
VD
CLKIN
CLKOUT
SSF
OSC1
OSC2
DSP101
8
A unique Tag feature allows additional digital data to be
appended to the conversion results, so that a single data
word contains conversion results plus other signal informa-
tion, such as gain settings or multiplexer channel settings in
front of the converter.
The DSP101 and DSP102 are high-resolution A/D convert-
ers complete with sampling capability and on-board refer-
ences. They can acquire and convert analog signals at up to
a 200kHz sampling rate. Both operate from 5V supplies,
and have full-scale analog input ranges of 2.75V.
BASIC OPERATION
Figure 2 shows the minimum connections required to oper-
ate the DSP101. The falling edge of a convert command on
pin 21 puts the internal sampling capacitor array into the
hold state. The falling edge on pin 21 also starts the process
to initiate a conversion and transmit data from the previous
conversion, synchronizing both appropriately to the 10MHz
clock input on pin 13. Figure 1 shows the timing relationship
between the convert command, the output data, and the
synchronization pulse.
In this basic system, the 10MHz clock is used both to
generate a 3.33MHz conversion clock and as the data trans-
fer bit clock for outputting data. Per Figure 1, there must be
at least 72 clock pulses on pin 13 between convert com-
mands, so that this circuit can sample and convert at up to
138kHz.
DGND
AGND
CONV
SOUT
SYNC
XCLK
REF
CAP
TAG
NC
NC
NC
NC
NC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
(1)
(1)
(1)
(1)
(1)
Synch
Pulse
= Analog Ground
+
10µF
0.1µF
Convert Command
Serial Data Output
= Digital Ground
Bit Clock