UPD16434 NEC, UPD16434 Datasheet - Page 8

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UPD16434

Manufacturer Part Number
UPD16434
Description
1/8/ 1/16 DUTY LCD CONTROLLER/DRIVER
Manufacturer
NEC
Datasheet

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1.11 SYNC (Synchronous) … 3-state input/output
synchronous signal in order to synchronize the phases of all LCD drive alternate cycle signals (row/column signals)
with the frame period.
output mode.
reads the SYNC pulse output from the master chip for synchronization with the master chip.
modes, respectively.
the input mode, the SYNC pin must be fixed to V
In a multi-chip configuration, in which the row drive signal is commonly used, this pin inputs/outputs the
One chip in the multi-chip configuration is selected as the master, and the SYNC pin of the master is set to the
The remaining chips all serve as slave chips, and these SYNC pins are set to the input mode.
The SMM command is used to specify whether the pin functions as an input or output pin.
The master chip, set in the output mode, outputs the SYNC pulse in the last cycle in each frame. A slave chip
Figure 1-1 and Figure 1-2 show SYNC pulse output timing waveforms in 8-time-division and 16-time-division
In single chip configuration, the SYNC pin can be set in either the input or output mode. However, when it is set in
ROW0
SYNC
ROW0
SYNC
Figure 1–2. SYNC Signal in 16-Time-Division Mode
Figure 1–1. SYNC Signal in 8-Time-Division Mode
Data Sheet S10299EJ4V0DS00
SS
1 frame
. If it is set in the output mode, the SYNC pin must be left open.
1 frame
PD16434

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