LM3S600 Bookham Technology, Inc., LM3S600 Datasheet - Page 132

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LM3S600

Manufacturer Part Number
LM3S600
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet

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General-Purpose Input/Outputs (GPIOs)
GPIO Raw Interrupt Status (GPIORIS)
GPIO Port A base: 0x4000.4000
GPIO Port B base: 0x4000.5000
GPIO Port C base: 0x4000.6000
GPIO Port D base: 0x4000.7000
GPIO Port E base: 0x4002.4000
Offset 0x414
Type RO, reset 0x0000.0000
132
Reset
Reset
Type
Type
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
Register 7: GPIO Raw Interrupt Status (GPIORIS), offset 0x414
The GPIORIS register is the raw interrupt status register. Bits read High in GPIORIS reflect the
status of interrupt trigger conditions detected (raw, prior to masking), indicating that all the
requirements have been met, before they are finally allowed to trigger by the GPIO Interrupt Mask
(GPIOIM) register (see page 131). Bits read as zero indicate that corresponding input pins have not
initiated an interrupt. All bits are cleared by a reset.
RO
RO
30
14
0
0
reserved
Name
RIS
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
26
10
0
0
Reset
0x00
0x00
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPIO Interrupt Raw Status
Reflects the status of interrupt trigger condition detection on pins (raw,
prior to masking).
The RIS values are defined as follows:
RO
RO
Value
24
0
8
0
reserved
0
1
Description
Corresponding pin interrupt requirements not met.
Corresponding pin interrupt has met requirements.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RIS
RO
RO
19
0
3
0
RO
RO
18
0
2
0
October 01, 2007
RO
RO
17
0
1
0
RO
RO
16
0
0
0

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