LM3S600 Bookham Technology, Inc., LM3S600 Datasheet - Page 221

• Manufacturer Part Number: LM3S600
• Description: Microcontroller
• Manufacturer: Bookham Technology, Inc.

11.4
Table 11-1. UART Register Map
October 01, 2007
Offset
0x02C
0x03C
0x000
0x004
0x018
0x024
0x028
0x030
0x034
0x038
0x040
Name
UARTDR
UARTRSR/UARTECR
UARTFR
UARTIBRD
UARTFBRD
UARTLCRH
UARTCTL
UARTIFLS
UARTIM
UARTRIS
UARTMIS
BRD = 20,000,000 / (16 * 115,200) = 10.8507
which means that the DIVINT field of the UARTIBRD register (see page 229) should be set to 10.
The value to be loaded into the UARTFBRD register (see page 230) is calculated by the equation:
UARTFBRD[DIVFRAC] = integer(0.8507 * 64 + 0.5) = 54
With the BRD values in hand, the UART configuration is written to the module in the following order:
1.
2.
3.
4.
5.
Register Map
Table 11-1 on page 221 lists the UART registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that UART’s base address:
■
■
Note:
UART0: 0x4000.C000
UART1: 0x4000.D000
Disable the UART by clearing the UARTEN bit in the UARTCTL register.
Write the integer portion of the BRD to the UARTIBRD register.
Write the fractional portion of the BRD to the UARTFBRD register.
Write the desired serial parameters to the UARTLCRH register (in this case, a value of
0x0000.0060).
Enable the UART by setting the UARTEN bit in the UARTCTL register.
The UART must be disabled (see the UARTEN bit in the UARTCTL register on page 233)
before any of the control registers are reprogrammed. When the UART is disabled during
a TX or RX operation, the current transaction is completed prior to the UART stopping.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0090
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0300
0x0000.0012
0x0000.0000
0x0000.000F
0x0000.0000
Reset
Preliminary
Description
UART Data
UART Receive Status/Error Clear
UART Flag
UART Integer Baud-Rate Divisor
UART Fractional Baud-Rate Divisor
UART Line Control
UART Control
UART Interrupt FIFO Level Select
UART Interrupt Mask
UART Raw Interrupt Status
UART Masked Interrupt Status
LM3S600 Microcontroller
page
See
223
225
227
229
230
231
233
234
236
238
239
221