LM3S600 Bookham Technology, Inc., LM3S600 Datasheet - Page 171
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LM3S600
Manufacturer Part Number
LM3S600
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600.pdf
(378 pages)
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October 01, 2007
Bit/Field
1:0
Name
TAMR
Type
R/W
Reset
0x0
Preliminary
Description
GPTM TimerA Mode
The TAMR values are defined as follows:
The Timer mode is based on the timer configuration defined by bits 2:0
in the GPTMCFG register (16-or 32-bit).
In 16-bit timer configuration, TAMR controls the 16-bit timer modes for
TimerA.
In 32-bit timer configuration, this register controls the mode and the
contents of GPTMTBMR are ignored.
Value
0x0
0x1
0x2
0x3
Description
Reserved.
One-Shot Timer mode.
Periodic Timer mode.
Capture mode.
LM3S600 Microcontroller
171
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