AN1231 Motorola / Freescale Semiconductor, AN1231 Datasheet - Page 3

• Manufacturer Part Number: AN1231
• Description: Plastic Ball Grid Array (PBGA)
• Manufacturer: Motorola / Freescale Semiconductor

figuration, presents some unique challenges to overcome
with respect to motherboard routing when compared to pe-
ripherally leaded devices. Additionally, the volume of solder
in the joint is relatively large and since all of it is molten during
reflow, special considerations must be taken when determin-
ing appropriate pad geometries.
SOLDER PAD GEOMETRY
with PBGA: copper or non–soldermask defined (NSMD) and
soldermask defined (SMD). The NSMD case is similar to a
standard surface mount pad where there is a soldermask
clearance around the copper solder pad. The SMD type of
pad has a larger copper than soldermask opening diameter.
Both pad types have been used successfully by Motorola but
the NSMD pad type is recommended for most applications. It
has the advantage that copper dimensions can typically be
controlled more tightly than soldermask and a hot air solder
leveled (HASL or HAL) surface finish with better uniformity
and coverage can usually be achieved. An additional advan-
tage may be a lower stress concentration on the PBGA sol-
der joint and accompanying increased solder joint reliability.
This advantage can only be realized when NSMD pads are
employed on both the PCB and PBGA package. The SMD
pad, because of its greater copper area and soldermask
overlap, has greater adhesion strength to the epoxy/glass
laminate. This extra strength could be important in certain
extreme bending and accelerated thermal cycling testing
where the pad to PCB adhesion is the weak link and could be
the failure location as opposed to the typical solder fracture.
for the increased adhesion strength as mentioned above.
Some newer PBGA designs from Motorola may contain
NSMD pads. The user should ask for pad information regard-
ing a specific design packaged in PBGA. For either SMD and
NSMD pads, the goal is to have the PBGA diameter equal to
that on the package. In general, 1.5 mm and 60.0 mil pitch
designs from Motorola have a 25 mil solderable surface di-
ameter. For 1.27 mm pitch, this diameter is reduced to
approximately 23 mils. Once again, the exact diameter for
any given PBGA design should be obtained from Motorola
prior to the start of layout so that the motherboard can be de-
signed with an equal diameter.
solder pads internal to the PBGA usually contain integral
vias. This configuration, which is pictured in NSMD form in
Figure 1a, is sometimes referred to as a “dog–bone” or
“dumbbell” pad. The pad in Figure 1a is dimensioned as it
would be for use with a 1.27 mm pitch PBGA which con-
tained a 23 mil pad. In this figure, the via, via pad, and via
soldermask clearance are shown as recommended but
some variation is permissible. The copper always be main-
tained at 23 mils for most 1.27 mm pitch and 25 mils for most
1.5 mm and 60.0 mil pitch designs and there should always
be at least 1 mil of soldermask clearance around that. The
soldermask opening in the figure is shown at 31 mils which
assumes a soldermask to artwork registration of 3 mils.
This 3 mils is typical in the industry for no cost adder PCB
technology, although suppliers may range from 2 to 5 or
higher mils. At 2 mils only 6 mils would have to be added to
MOTOROLA FAST SRAM
The PBGA package, with its leads or balls in an array con-
There are two basic types of solder pads commonly used
The PBGA itself has traditionally contained an SMD pad
As will be covered in the next section on escape routing,
MOTHERBOARD LAYOUT
the 23 or 25 mil copper diameter to ensure a 1 mil solder-
mask clearance at worst case registrational tolerance. It is
recommended that the width of the trace attached to NSMD
pads should be not much greater than the 8 mils shown in
Figure 1a. A trace much wider than this will cause the pad to
begin to resemble a mixture between NSMD (on the side of
the pad away from the trace) and SMD (where the trace is
covered with soldermask). Also, a fillet should always be
present where the trace joins the solder pad and no more
than one trace should joined to any NSMD solder pad.
dog–bone and tear drop shapes, respectively. For these
SMD pads, the soldermask and copper diameters are simply
reversed compared to the NSMD pads. The one mil solder-
mask clearance necessary for SMD pads becomes a mini-
mum overlap and this overlap may be slightly reduced since
any overlap greater than 0 mils will result in no changes to
the solder joint geometry. Figure 2d is simply the NSMD pad
shown without a via as would be used on external rows.
when determining which solder pad to use is the effect on
stand–off height. With NSMD pads, the solder wets down the
side of the pad and creates an effectively larger solder pad
diameter. For a given diameter this results in an effectively
lower stand–off for NSMD pads. This is illustrated in Figure
3, where a larger volume of solder is needed in the NSMD
pad case to maintain the same stand–off between as the
SMD case.
ESCAPE ROUTING
routing all the required signal, power and ground pins to the
system board without increasing printed circuit board (PCB)
complexity and therefore cost. Fortunately, this challenge is
easily overcome by Motorola with thoughtful package pin as-
signment and device configuration considerations (pitch, ball
count, ball depopulation methods) in conjunction with the
choice of solder pad geometry and board technology (num-
ber of layers and line/space widths). If signal pin assign-
ments are made too deeply within the BGA matrix, board
level escape using conventional eight mil printed circuit
board fabrication technology becomes difficult for large ma-
trices. Current PCB technology with eight mil lines and eight
mil spaces typically does not incur any additional cost. For
this reason Motorola attempts to perform signal pin assign-
ment such that the outer four rows of the PBGA contain all
the signals that must be escaped. The Motorola 68356 chip
is an example of such a properly assigned BGA footprint that
provides users with easy board–level escape with no cost
adders for sub–eight mil line and space board technology or
internal signal layers. The 68356 is a Signal Processing
Communications Engine with integrated functions such as a
68000 based microprocessor, RISC communications core,
24 bit DSP and a PCMCIA controller. The device is housed in
a 25 mm PBGA, using a 1.27 mm ball pitch. The balls are in
a 19x19 array with the four corner balls depopulated to result
in 357 pins.
this package is the location of the power and ground assign-
ments to an 11x11 matrix in the center of the package. Within
this inner matrix, the centermost 9x9 pins form a ground bus
and the remaining 40 pins encircle that with what is called a
power ring. Those power and ground pins do not need to be
Figures 1b and 1c show SMD pads with integral vias in
One other consideration that should be taken into account
A perceived drawback of using BGA is the challenge of
One of the key features that facilitates the routeability of
AN1231
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