UPD78323 NEC, UPD78323 Datasheet - Page 62
![no-image](/images/manufacturer_photos/0/4/470/nec_sml.jpg)
UPD78323
Manufacturer Part Number
UPD78323
Description
16/8-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC
Datasheet
1.UPD78323.pdf
(86 pages)
- Current page: 62 of 86
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62
Note
CMPBKC
CMPMNC
CMPBKNC
MOV
SWRS
SEL
NOP
EI
DI
Mnemonic
If the operation code of STBC register and WDM register operation instructions is abnormal, an operation code
trap interrupt is generated.
Operation in the eent of trap:
(SP–1)
(SP–3)
PC
SP
L
[DE + ], [HL + ]
[DE – ], [HL – ]
[DE + ], A
[DE – ], A
[DE + ], [HL + ]
[DE – ], [HL – ]
STBC, #byte
WDM, #byte
RBn
RBn, ALT
SP–4, IE
(003CH), PC
PSW
(PC–4)
Operand
H
, (SP–2)
H
, (SP–4)
0
H
(003DH),
PSW
2
2
2
2
2
2
4
4
1
2
2
1
1
1
(PC–4)
(DE + ) – (HL + ), C
End if C=0 or CY=0
(DE – ) – (HL – ), C
End if C=0 or CY=0
(DE + ) – A, C
End if C=0 or CY=1
(DE – ) – A, C
End if C=0 or CY=1
(DE + ) – (HL + ), C
End if C=0 or CY=1
(DE – ) – (HL – ), C
End if C=0 or CY=1
STBC
WDM
RSS
RBS2 – 0
RBS2 – 0
No Operation
IE
IE
L
,
L
1 (Enable Interrupt)
0 (Disable Interrupt)
,
RSS
byte
byte
Note
n, RSS
n, RSS
Note
Operation
C–1
C–1
C–1
C–1
C–1
C–1
0
1
S
PD78323, 78324
Z
Flags
AC P/V CY
V
V
V
V
V
V
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