CY28349 SpectraLinear, CY28349 Datasheet
CY28349
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CY28349 Summary of contents
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... VDD_3V66 3V66_0:2 VDD_PCI PCI_F0:2 PCI0:6 VDD_48MHz 3V66_3/48MHz_1 VTT_PWRGD# VDD_48MHz 48MHz_0 GND_48MHz *FS0/48MHz_0 24_48MHz *FS1/24_48MHz 2 VDD_48MHz RST# Tel:(408) 855-0555 CY28349 ® 4 CPU and Chipsets 3V66 PCI REF [1] Pin Configuration 1 48 REF0/MULTSEL0* VDD_REF 2 47 GND_REF 3 46 ...
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... USB host controller and SIO devices. We recommend system designer to configure this output as 48 MHz and “HIGH Drive” by setting Byte [5], Bit [0] and Byte [9], Bit [7], respectively MHz or 66 MHz Output: 3.3V output. CY28349 Pin Description Page ...
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... PCI output buffers, reference output buffers and 48-MHz output buffers. Connect to 3.3V. G Ground Connection: Connect all ground pins to the common system ground plane 3.3V Analog Power Connection: Power supply for core logic, PLL circuitry. Connect to 3.3V Analog Ground Connection: Ground for core logic, PLL circuitry. CY28349 Pin Description Page ...
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... IREF = 5. 475 1%, IREF = 2. 475 1%, IREF = 2. 475 1%, IREF = 2. 475 1%, IREF = 2. 475 1%, IREF = 2. 475 1%, IREF = 2. 475 1%, IREF = 2. 475 1%, IREF = 2.32 mA CY28349 Output Current 4*Iref 1. 4*Iref 1. 5*Iref 1.25V @ 5*Iref 1. 6*Iref 1. ...
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... CY28349 Descriptions Block Read Protocol Description Start Slave address – 7 bits Write Acknowledge from slave Command Code – 8 bits ‘00000000’ stands for block operation Acknowledge from slave Repeat start Slave address – 7 bits Read Acknowledge from slave Byte count from slave – ...
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... SW Frequency selection bits. See Table 4. Name (Active/Inactive) (Active/Inactive) (Active/Inactive) (Active/Inactive) (Active/Inactive) CY28349 Byte Read Protocol Description Start Slave address – 7 bits Write Acknowledge from slave Command Code – 8 bits ‘1xxxxxxx’ stands for byte operation ...
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... SW control; IREF multiplier is determined by Byte[4], Bit[5:6]. IREF multiplier 00 = Ioh IREF 01 = Ioh IREF 10 = Ioh IREF 11 = Ioh IREF Reserved Reserved Reserved Reserved Reserved CY28349 Power On Description Power On Pin Description Power On Pin Description Power On Pin Description Page Default 1 ...
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... Bit[0] of Cypress Semiconductor’s Vendor ID. This bit is read only. Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Name Reserved Reserved CY28349 Power On Pin Description Power On Pin Description Power On Pin Description Power On Pin Description Page Default ...
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... Watchdog Timer time-out occurs. Under recovery frequency mode, CY28349 will not respond to any attempt to change output frequency via the SMBus control bytes. System software can unlock CY28349 from its recovery frequency mode by clearing the WD_EN bit. Reserved CY28349 ...
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... ROCV_FREQ_SEL determines the source of the recover frequency when a Watchdog Timer time-out occurs. The clock generator will automatically switch to the recovery CPU frequency based on the selection on ROCV_FREQ_SEL From latched FS[4: From the settings of ROCV_FREQ_N[7:0] & ROCV_FREQ_M[6:0] CY28349 Power On Pin Description Power On Pin Description Power On Pin Description Page ...
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... When it is set, the frequency ratio stated in the SEL[4:0] register will be used. Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved. Write with “1” Reserved. Write with “1” CY28349 Power On Pin Description Power On Pin Description Power On Pin Description Power On Pin Description Page Default ...
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... CY28349 Power On Pin Description Power On Pin Description PLL Gear Constants 3V66 PCI 67.1 33.6 48.00741 67.3 33.6 48.00741 72.0 36.0 48.00741 67.5 33.7 48.00741 76.0 38.0 48.00741 78.0 39.0 48.00741 80.0 40.0 48.00741 82.0 41.0 48.00741 63 ...
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... Watchdog Timer before they attempt to make a frequency change. If the system hangs and a Watchdog Timer time-out occurs, a system reset will be generated and a recovery frequency will be activated. All of the related registers are summarized in Table 5. Description CY28349 PLL Gear Constants 3V66 PCI (G) 66 ...
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... M-Value Register and select the CPU output frequency by changing the value of the N-Value Register. Fixed Value for Gear Constants M-Value Register 48.00741 93 48.00741 45 Description Range of N-Value Register for Different CPU Frequency 97–255 127–245 CY28349 Page ...
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... < V < For I =6*IRef Configuration OH REF, 48 MHz 3V66, PCI REF, 48MHz 3V66, PCI, Three-state /V = 3.465V, F DD_CORE DD33 3.465V DD_CORE DDQ3 CY28349 Min. Max. 3.135 3.465 22 14.318 14.318 Min. Max. Unit /2 2 – –1 mA 2.4 ...
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... CY28349 Max. Unit 55 % 700 ps 2.0 V/ns 4.0 V/ns 700 ps 2.0 V/ns 4.0 V/ns 150 ps 500 ps 500 ps 3.5 ns 200 ps 250 ps 350 ps 500 ps 1000 20 0.2 V 0.74 V ...
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... Duty Cycle Timing (CPU Differential Output) www.DataSheet4U.com t All Outputs Rise/Fall Time OUTPUT t 2 CPU-CPU Clock Skew Host_b Host Host_b Host t 4 3V66-3V66 Clock Skew 3V66 3V66 PCI-PCI Clock Skew PCI PCI Rev 1.0, November 24, 2006 CY28349 Page ...
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... Switching Waveforms 3V66-PCI Clock Skew 3V66 PCI www.DataSheet4U.com CPU Clock Cycle-Cycle Jitter Host_b Host Cycle-Cycle Clock Jitter CLK Rev 1.0, November 24, 2006 (continued CY28349 Page ...
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... For use with onboard video using 48 MHz for Dot Clock or connect to VDDQ3 0.005 0.1 F CY28349 Page ...
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... Spectra Linear Inc., and expressed written agreement by Spectra Linear Inc. Spectra Linear Inc. reserves the right to change any circuitry or specification without notice. Rev 1.0, November 24, 2006 Package Type 48-Lead Shrunk Small Outline Package O48 CY28349 Operating Range Commercial Commercial Commercial Commercial ...