CY28447 ETC, CY28447 Datasheet - Page 13

• Manufacturer Part Number: CY28447
• Description: Clock Generator
• Manufacturer: ETC

Rev 1.0, November 20, 2006
PCI_STP# Assertion
The PCI_STP# signal is an active LOW input used for
synchronous stopping and starting the PCI outputs while the
rest of the clock generator continues to function. The set-up
time for capturing PCI_STP# going LOW is 10 ns (t
Figure 10.) The PCIF clocks will not be affected by this pin if
their corresponding control bit in the SMBus register is set to
allow them to be free running.
CPUC(Free Running)
CPUT(Free Running)
CPUC(Stoppable)
CPUT(Stoppable)
CPU_STOP#
SRC 100MHz
PCI_STP#
DOT96T
DOT96C
PCI_F
PD
Figure 9. CPU_STP# = Tri-state, CPU_PD = Tri-state, DOT_PD = Tri-state
PCI
Tsu
Figure 10. PCI_STP# Assertion Waveform
SU
). (See
1.8mS
CY28447
Page 13 of 21