MT28F128J3FS-15F Micron, MT28F128J3FS-15F Datasheet - Page 25

• Manufacturer Part Number: MT28F128J3FS-15F
• Description: 128Mb Q-FLASH MEMORY
• Manufacturer: Micron

CLEAR BLOCK LOCK BITS COMMAND
all set block lock bits in parallel. This command is in-
valid when the ISM is running or the device is sus-
pended. The CLEAR BLOCK LOCK BITS command is
executed by a two-cycle sequence. First, a clear block
lock bits setup is written, followed by a CLEAR BLOCK
LOCK BITS CONFIRM command. Then the device au-
tomatically outputs status register data when read (see
Figure 9). The CPU can detect completion of the clear
block lock bits event by analyzing the STS pin output or
the status register bit SR7. When the operation is com-
pleted, status register bit SR5 should be checked. If a
clear block lock bits error is detected, the status register
should be cleared. The CEL remains in read status reg-
ister mode until another command is issued.
lock bits are not accidentally cleared. An invalid clear
block lock bits command sequence results in status
register bits SR4 and SR5 being set to “1.” Also, a reli-
able CLEAR BLOCK LOCK BITS operation can only oc-
cur when V
LOCK BITS operation is attempted when V
SR3 and SR5 are set to “1.” If a CLEAR BLOCK LOCK
BITS operation is aborted due to V
out of valid range, block lock bit values are left in an
undetermined state. To initialize block lock bit con-
tents to known values, a repeat of CLEAR BLOCK LOCK
BITS is required.
(MT28F320J3 only) via the SECURE BLOCK LOCK com-
mand, issuing the CLEAR BLOCK LOCK BITS command
will result in no change to the block lock status.
SECURE BLOCK LOCK COMMAND
ers can use the SECURE BLOCK LOCK command to the
specified block, or blocks on the device. Table 18 pro-
vides more details.
128Mb, 64Mb, 32Mb Q-Flash Memory
MT28F640J3_6.p65 – Rev. 5, Pub. 6/02
The CLEAR BLOCK LOCK BITS command can clear
This two-step setup sequence ensures that block
If a block is already security block locked
For added protection on the MT28F320J3, design-
CC
and V
NOTE: Use 11100h to lock bits 1 and 0.
PEN
DQ4
1
1
1
1
0
are valid. If a CLEAR BLOCK
DQ3
PEN
1
1
1
0
1
or V
Security Block Lock Definition
CC
DQ2
transitioning
PEN
1
1
0
1
1
V
PENLK
DQ1
Table 18
1
0
1
1
1
,
25
DQ0
BITS command, and functions in a similar manner.
This command is invalid when the ISM is running, or
when the device is suspended. SECURE BLOCK LOCK
commands are executed using a two-cycle sequence.
In the first cycle, the SECURE BLOCK LOCK command
(C0h) is issued, and the address is a “Don’t Care.” In
the second cycle, an address of 8Ch is issued, along
with the relevant DQ4–DQ0 bits reset to LOW. Table 18
shows the relevant values of DQ4–DQ0 for each secu-
rity block lock scenario. To security lock the entire de-
vice, DQ4 = 0b. The lock block bits status can be checked
using the READ IDENTIFIER CODES command (see
Table 14). If 01111h (lock all 32 bits) is input during the
second cycle of the secure block lock command se-
quence, the device cannot be written again.
in status register bits SR4 and SR5 being set to “1.” Also,
reliable operation occurs only when V
valid. When V
tected against any data change.
PROTECTION REGISTER PROGRAM
COMMAND
tion register to increase the security of a system design.
For example, the number contained in the protection
register can be used for the Flash component to com-
municate with other system components, such as the
CPU or ASIC, to prevent device substitution. The 128
bits of the protection register are divided into two 64-
bit segments. One of the segments is programmed at
the Micron factory with a unique and unchangeable
64-bit number. The other segment is left blank for
customers to program as needed. After the customer
segment is programmed, it can be locked to prevent
reprogramming.
0
1
1
1
1
This command is a superset of the SET BLOCK LOCK
An invalid SECURE BLOCK LOCK command results
The 3V Q-Flash memory includes a 128-bit protec-
FUNCTION
Locks block 0
Locks block 1
Locks block 30
Locks block 31
Locks all 32 blocks
Micron Technology, Inc., reserves the right to change products or specifications without notice.
PEN
is
128Mb, 64Mb, 32Mb
V
Q-FLASH MEMORY
PENLK
, lock bit contents are pro-
PRELIMINARY
CC
©2002, Micron Technology, Inc.
and V
PEN
are