CY7C4275-10ASC Cypress Semiconductor Corp, CY7C4275-10ASC Datasheet - Page 11

IC DEEP SYN FIFO 32KX18 64LQFP

CY7C4275-10ASC

Manufacturer Part Number
CY7C4275-10ASC
Description
IC DEEP SYN FIFO 32KX18 64LQFP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet

Specifications of CY7C4275-10ASC

Function
Synchronous
Memory Size
576K (32K x 18)
Data Rate
100MHz
Access Time
8ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1239

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C4275-10ASC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Waveforms
Document #: 38-06008 Rev. *A
Programmable Almost Empty Flag Timing (applies only in SMODE (SMODE is LOW))
Programmable Almost Full Flag Timing
Notes:
21. PAE offset
22. t
23. If a read is preformed on this rising edge of the read clock, there will be Empty + (n 1) words in the FIFO when PAE goes LOW.
24. PAF offset = m. Number of data words written into FIFO already = 32768
25. PAF is offset = m.
26. 32768 m words in CY7C4275 and 65536 – m words in CY7C4285.
27. 32768
PAF
WCLK
WCLK
rising RCLK is less than t
RCLK
SKEW3
RCLK
WEN
WEN
REN
PAE
REN
[25]
is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK and the
(m + 1) words in CY7C4275 and 65536 – (m + 1) CY7C4285.
n.
t
CLKH
SKEW3
, then PAE may not change state until the next RCLK.
(continued)
t
SKEW3
t
CLKH
t
ENS
[22]
t
ENH
t
CLKL
Note 24
Note 21
t
ENS
(m + 1) for the CY7C4285 and 65536
t
ENH
t
PAE synch
t
CLKL
t
PAF
t
t
ENS
ENS
FULL– M WORDS
N + 1 WORDS
IN FIFO
IN FIFO
t
ENS
[26]
t
PAF
t
ENH
(m + 1) for the CY7C4285.
FULL– (M+1) WORDS
Note 23
IN FIFO
CY7C4275
CY7C4285
Page 11 of 21
t
PAE synch
[27]
4275–14
4275–15

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