CY7C4275-10ASC Cypress Semiconductor Corp, CY7C4275-10ASC Datasheet - Page 17

IC DEEP SYN FIFO 32KX18 64LQFP

CY7C4275-10ASC

Manufacturer Part Number
CY7C4275-10ASC
Description
IC DEEP SYN FIFO 32KX18 64LQFP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet

Specifications of CY7C4275-10ASC

Function
Synchronous
Memory Size
576K (32K x 18)
Data Rate
100MHz
Access Time
8ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1239

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C4275-10ASC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Width Expansion Configuration
The CY7C4275/85 can be expanded in width to provide word
widths greater than 18 in increments of 18. During width ex-
pansion mode all control line inputs are common and all flags
are available. Empty (Full) flags should be created by ANDing
Document #: 38-06008 Rev. *A
FULL FLAG (FF)
DATA IN (D)
PROGRAMMABLE(PAE)
HALF FULL FLAG (HF)
Figure 1. Block Diagram of 32K x18/64K x 18 Deep Sync FIFO Memory Used in a Width Expansion Configuration
WRITE CLOCK (WCLK)
WRITE ENABLE (WEN)
LOAD (LD)
36
18
READ EXPANSION IN (RXI)
FF
RESET (RS)
7C4275
7C4285
EF
FIRST LOAD (FL)
18
18
WRITE EXPANSION IN (WXI)
the Empty (Full) flags of every FIFO; the PAE and PAF flags
can be detected from any one device. This technique will avoid
reading data from, or writing data to the FIFO that is “stag-
gered” by one clock cycle due to the variations in skew be-
tween RCLK and WCLK. Figure 1 demonstrates a 36-word width
by using two CY7C4275/85s.
FF
RESET (RS)
7C4275
7C4285
EF
READ CLOCK (RCLK)
READ ENABLE (REN)
OUTPUT ENABLE (OE)
PROGRAMMABLE (PAF)
18
DATA OUT (Q)
EMPTY FLAG (EF)
4275–24
CY7C4275
CY7C4285
Page 17 of 21
36

Related parts for CY7C4275-10ASC