RM5261-200-QI PMC-Sierra Inc, RM5261-200-QI Datasheet - Page 32

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RM5261-200-QI

Manufacturer Part Number
RM5261-200-QI
Description
RM5261 Microprocessor with 64-Bit System Bus Data Sheet Released
Manufacturer
PMC-Sierra Inc
Datasheet
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002241, Issue 1
8
Power Consumption
Notes
1.
2.
3.
Parameter
VccInt
Power
(mWatts)
Typical integer instruction mix with nominal supply voltage (untested).
Worst case instruction mix with maximum supply voltage.
I/O supply power is application dependent, but typically <20% of VccInt.
standby
active
Conditions:
Max: VccInt = 2.625
Typ: VccInt = 2.5V
No SysAD bus activity
R4000 write protocol with no FPU
operation
Write re-issue or pipelined writes
with superscalar
RM5261™ Microprocessor with 64-Bit System Bus Data Sheet
CPU Clock Speed
Typ
200 MHz
1600
1750
1
Max
3200
3500
350
2
Typ
250 MHz
1850
2025
1
Max
3700
4050
435
2
266 MHz
Typ
1900
2075
Released
1
Max
3800
4150
450
32
2

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