MX29LV640BU Macronix International, MX29LV640BU Datasheet - Page 18

• Manufacturer Part Number: MX29LV640BU
• Description: 64M-BIT [4M x 16] CMOS EQUAL SECTOR FLASH MEMORY
• Manufacturer: Macronix International

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SOFTWARE COMMAND DEFINITIONS
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values or writing them
in the improper sequence will reset the device to the
read mode. Table 3 defines the valid register command
sequences. Note that the Erase Suspend (B0H) and
TABLE 3. MX29LV640BU COMMAND DEFINITIONS
Legend:
X=Don't care
RA=Address of the memory location to be read.
RD=Data read from location RA during read operation.
PA=Address of the memory location to be programmed.
Addresses are latched on the falling edge of the WE# or
CE# pulse.
P/N:PM1081
Command
Read(Note 5)
Reset(Note 6)
Automatic Select(Note 7)
Enter Secured Silicon
Sector
Exit Secured Silicon
Sector
Program
Chip Erase
Sector Erase
Erase Suspend(Note 10)
Erase Resume(Note 11)
CFI Query (Note 12)
Manufacturer ID
Device ID
Secured Sector Factory
Protect (Note 9)
Sector Group Protect
Verify (Note 8)
Cycle
Bus
1
1
4
4
4
4
4
3
4
4
6
6
1
1
First Bus
Cycle
Addr
RA
XXX
555
555
555
555
555
555
555
555
555
555
555
555
55
Data Addr
RD
F0
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
B0
30
98
Second Bus Third Bus
Cycle
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
Data Addr
55
55
55
55
55
55
55
55
55
55
18
Erase Resume (30H) commands are valid only while the
Sector Erase operation is in progress. Either of the two
reset command sequences will reset the device (when
applicable).
All addresses are latched on the falling edge of WE# or
CE#, whichever happens later. All data are latched on
rising edge of WE# or CE#, whichever happens first.
PD=Data to be programmed at location PA. Data is latched
on the rising edge of WE# or CE# pulse.
SA=Address of the sector to be erased or verified.
Address bits A21-A16 uniquely select any sector.
Cycle
555
555
555
555
555
555
555
555
555
555
MX29LV640BU
Data Addr Data
90
90
90
90
90
88
90
A0
80
80
Fourth Bus
Cycle
X00
X01
X03
SA
X02
xxx
PA
555
555
C2
22D7
see
Note10
xx00
xx01
00
PD
AA
AA
Fifth Bus
Cycle
Addr Data Addr Data
2AA
2AA
REV. 1.0, MAR. 08, 2005
55
55
Sixth Bus
Cycle
555
SA
10
30