cy28549 SpectraLinear Inc, cy28549 Datasheet - Page 2

• Manufacturer Part Number: cy28549
• Description: Clock Generator For Intel Ck410m
• Manufacturer: SpectraLinear Inc

Document #:xxx-xxxxx Rev **
Pin Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
Pin No.
CPUC1_MCH,
PCI1
CLKREQ9#
VDD_SRC
SRCC_9
SRCT_9
VSS_SRC
CPUT2_ITP/SRCT10, O, DIF Selectable True differential CPU or SRC clock output.
VDDA
VSSA
GND
CPUT1_MCH,
VDD_CPU
CPUC0
CPUT0
VSS_CPU
SCLK
SDATA
VDD_REF
XOUT
XIN
VSS_REF
REF0/FSC_TESTSEL
CPU_STP#
PCI_SRC_STP#
CLKREQ2#
CLKREQ3#
CLKREQ5#
VDD_PCI
VSS_PCI
PCI2
PCI3
CPUC2_ITP/SRCC10 O, DIF Selectable Complementary differential CPU or SRC clock output.
Name
I/O, OD SMBus-compatible SDATA.
O, DIF Complementary 100-MHz Differential serial reference clocks.
O, DIF True 100-MHz Differential serial reference clocks.
O, DIF Complementary Differential CPU clock output to MCH
O, DIF True Differential CPU clock output to MCH
O, DIF Complementary Differential CPU clock output
O, DIF True Differential CPU clock output
O, SE 14.318-MHz crystal output.
O, SE 33MHz clock output
O, SE 33-MHz clock output
O, SE 33-MHz clock output
PWR 3.3V power supply for outputs.
PWR 3.3V power supply for PLL.
GND
PWR 3.3V power supply for outputs.
PWR 3.3V power supply for outputs.
PWR 3.3V power supply for outputs.
GND
GND
GND
GND
GND
Type
I/O
I
I
I
I
I
I
I
I
3.3V LVTTL input for enabling assigned SRC clock (active LOW).
Ground for outputs.
ITP_SEL = 0 @ VTTPWRGD#/PD assertion = SRC10
ITP_SEL = 1 @ VTTPWRGD#/PD assertion = CPU2
ITP_SEL = 0 @ VTTPWRGD#/PD assertion = SRC10
ITP_SEL = 1 @ VTTPWRGD#/PD assertion = CPU2
Ground for PLL.
Ground for outputs.
Ground for outputs.
Ground for outputs.
selection/Selects test mode if pulled to V
asserted LOW.
Refer to DC Electrical Specifications table for V
cations.
3.3V LVTTL input for enabling assigned SRC clock (active LOW).
3.3V LVTTL input for enabling assigned SRC clock (active LOW).
3.3V LVTTL input for enabling assigned SRC clock (active LOW).
SMBus-compatible SCLOCK.
14.318-MHz crystal input.
Fixed 14.318 clock output/3.3V-tolerant input for CPU frequency
3.3V LVTTL input for CPU_STP# active LOW
3.3V LVTTL input for PCI_STP# active LOW
Ground for outputs.
PRELIMINARY
Description
IMFS_C
ILFS_C
when VTTPWRGD#/PD is
,V
IMFS_C
,V
CY28549
IHFS_C
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specifi-