si5315 Silicon Laboratories, si5315 Datasheet - Page 52

• Manufacturer Part Number: si5315
• Description: Synchronous Ethernet/telecom Jitter Attenuating Clock Multiplier
• Manufacturer: Silicon Laboratories

Si5315
12. Package Outline: 36-Pin QFN
Figure 23 illustrates the package details for the Si5315. Table 20 lists the values for the dimensions shown in the
illustration.
52
Notes:
Symbol
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-220, variation VJJD.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body
A1
D2
E2
D
A
b
e
E
Components.
0.80
0.00
0.18
3.95
3.95
Min
Millimeters
6.00 BSC
0.50 BSC
6.00 BSC
Nom
0.85
0.02
0.25
4.10
4.10
Figure 23. 36-Pin Quad Flat No-Lead (QFN)
Table 20. Package Dimensions
Max
0.90
0.05
0.30
4.25
4.25
Preliminary Rev. 0.2
Symbol
aaa
bbb
ddd
eee
ccc
L

0.50
Min
—
—
—
—
—
—
Millimeters
Nom
0.60
—
—
—
—
—
—
Max
0.70
0.10
0.10
0.08
0.10
0.05
12º