74LVC74ABQ,115 NXP Semiconductors, 74LVC74ABQ,115 Datasheet - Page 4

• Manufacturer Part Number: 74LVC74ABQ,115
• Description: IC DUAL D FF POS-EDGE 14DHVQFN
• Manufacturer: NXP Semiconductors
• Series: 74LVCr
• Type: D-Typer

Specifications of 74LVC74ABQ,115

• Package / Case: 14-VQFN Exposed Pad, 14-HVQFN, 14-SQFN, 14-DHVQFN
• Function: Set(Preset) and Reset
• Output Type: Differential
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 250MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: LVC
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 2.5 ns at 3.3 V
• High Level Output Current: - 24 mA
• Supply Voltage (max): 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 1.2 V
• Delay Time - Propagation: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LVC74ABQ-G; 74LVC74ABQ-G; 935273502115

NXP Semiconductors
6. Functional description
Table 3.
[1]
Table 4.
[1]
7. Limiting values
Table 5.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
74LVC74A_6
Product data sheet
Input
nSD
L
H
L
Input
nSD
H
H
Symbol
V
I
V
I
V
I
I
I
T
P
IK
OK
O
CC
GND
CC
I
O
stg
tot
H = HIGH voltage level
L = LOW voltage level
X = don’t care
H = HIGH voltage level
L = LOW voltage level
Q
X = don’t care
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
For SO14 packages: above 70 C the value of P
For (T)SSOP14 packages: above 60 C the value of P
For DHVQFN14 packages: above 60 C the value of P
n+1
= LOW-to-HIGH transition
= state after the next LOW-to-HIGH CP transition
Function table
Function table
Limiting values
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
nRD
H
L
L
nRD
H
H
[1]
[1]
nCP
X
X
X
nCP
Conditions
V
V
V
T
tot
I
O
O
amb
< 0 V
derates linearly with 8 mW/K.
> V
= 0 V to V
Rev. 06 — 4 June 2007
Dual D-type flip-flop with set and reset; positive-edge trigger
= 40 C to +125 C
tot
tot
CC
derates linearly with 5.5 mW/K.
derates linearly with 4.5 mW/K.
or V
CC
O
nD
X
X
X
nD
L
H
< 0 V
[1]
[2]
[3]
Output
nQ
H
L
H
Output
nQ
L
H
Min
-
-
-
-
0.5
50
0.5
0.5
100
65
n+1
Max
+6.5
-
+6.5
V
100
-
+150
500
50
50
CC
74LVC74A
+ 0.5
© NXP B.V. 2007. All rights reserved.
nQ
L
H
H
nQ
H
L
n+1
Unit
V
mA
V
mA
V
mA
mA
mA
mW
C
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