74LVC74ABQ,115 NXP Semiconductors, 74LVC74ABQ,115 Datasheet - Page 8
![IC DUAL D FF POS-EDGE 14DHVQFN](/photos/6/94/69489/568-14dhvqfn_sot762_sml.jpg)
74LVC74ABQ,115
Manufacturer Part Number
74LVC74ABQ,115
Description
IC DUAL D FF POS-EDGE 14DHVQFN
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Typer
Datasheet
1.74LVC74AD118.pdf
(16 pages)
Specifications of 74LVC74ABQ,115
Package / Case
14-VQFN Exposed Pad, 14-HVQFN, 14-SQFN, 14-DHVQFN
Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
250MHz
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
LVC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
2.5 ns at 3.3 V
High Level Output Current
- 24 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
1.2 V
Delay Time - Propagation
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Delay Time - Propagation
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
74LVC74ABQ-G
74LVC74ABQ-G
935273502115
74LVC74ABQ-G
935273502115
NXP Semiconductors
74LVC74A_6
Product data sheet
Fig 8. The set (nSD) and reset (nRD) input to output (nQ, nQ) propagation delays, the set and reset pulse widths,
V
V
V
and the nRD to nCP recovery time
M
M
OL
= 1.5 V at V
= 0.5
and V
OH
V
CC
are typical output voltage levels that occur with the output load.
CC
at V
2.7 V;
CC
< 2.7 V;
nCP input
nSD input
nRD input
nQ output
nQ output
GND
GND
GND
V
V
V
V
OH
OH
OL
OL
V
V
V
I
I
I
V
M
Rev. 06 — 4 June 2007
Dual D-type flip-flop with set and reset; positive-edge trigger
t
V
V
W
M
M
t
t
PLH
PHL
V
M
t
W
t
t
PHL
PLH
V
M
mna423
t
rec
74LVC74A
© NXP B.V. 2007. All rights reserved.
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