74LVC74ABQ,115 NXP Semiconductors, 74LVC74ABQ,115 Datasheet - Page 5
![IC DUAL D FF POS-EDGE 14DHVQFN](/photos/6/94/69489/568-14dhvqfn_sot762_sml.jpg)
74LVC74ABQ,115
Manufacturer Part Number
74LVC74ABQ,115
Description
IC DUAL D FF POS-EDGE 14DHVQFN
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Typer
Datasheet
1.74LVC74AD118.pdf
(16 pages)
Specifications of 74LVC74ABQ,115
Package / Case
14-VQFN Exposed Pad, 14-HVQFN, 14-SQFN, 14-DHVQFN
Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
250MHz
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
LVC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
2.5 ns at 3.3 V
High Level Output Current
- 24 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
1.2 V
Delay Time - Propagation
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Delay Time - Propagation
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
74LVC74ABQ-G
74LVC74ABQ-G
935273502115
74LVC74ABQ-G
935273502115
NXP Semiconductors
8. Recommended operating conditions
Table 6.
9. Static characteristics
Table 7.
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
[1]
74LVC74A_6
Product data sheet
Symbol
V
V
V
T
Symbol Parameter
V
V
V
V
I
I
C
I
CC
amb
t/ V
I
CC
I
o
IH
IL
OH
OL
I
CC
All typical values are measured at V
HIGH-level
input voltage
LOW-level
input voltage
HIGH-level
output
voltage
LOW-level
output
voltage
input leakage
current
supply
current
additional
supply
current
input
capacitance
Recommended operating conditions
Static characteristics
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and
fall rate
Conditions
V
V
V
V
V
V
V
V
I
per input pin;
V
V
V
V
O
CC
CC
CC
CC
I
I
CC
CC
CC
I
CC
I
I
V
I
I
I
I
V
I
I
= V
= V
= 0 A
= V
= GND to V
O
O
O
O
O
O
O
CC
CC
= 1.2 V
= 2.7 V to 3.6 V
= 1.2 V
= 2.7 V to 3.6 V
= 3.6 V; V
= 3.6 V; V
= 2.7 V to 3.6 V;
= 0 V to 3.6 V;
= 100 A;
= 12 mA; V
= 18 mA; V
= 24 mA; V
= 100 A;
= 12 mA; V
= 24 mA; V
IH
IH
CC
= 2.7 V to 3.6 V
= 2.7 V to 3.6 V
or V
or V
CC
0.6 V; I
IL
IL
= 3.3 V (unless stated otherwise) and T
CC
I
I
Conditions
for maximum speed performance
for low-voltage applications
V
V
= 5.5 V or GND
= V
CC
CC
CC
CC
CC
CC
CC
O
CC
= 2.7 V
= 3.0 V
= 1.2 V to 2.7 V
= 2.7 V to 3.6 V
= 0 A
= 2.7 V
= 3.0 V
= 3.0 V
or GND;
Rev. 06 — 4 June 2007
Dual D-type flip-flop with set and reset; positive-edge trigger
V
CC
Min
V
2.0
2.2
2.4
2.2
CC
-
-
-
-
-
-
-
-
-
0.2
40 C to +85 C
Typ
0.1
4.0
0.1
5
amb
-
-
-
-
-
-
-
-
-
-
[1]
= 25 C.
Min
2.7
1.2
0
0
0
0
Max
0.55
500
0.8
0.2
0.4
40
10
0
-
-
-
-
-
-
-
5
V
CC
2.05
2.25
Typ
-
-
-
-
-
-
-
Min
V
40 C to +125 C
2.0
2.0
CC
-
-
-
-
-
-
-
-
-
0.3
74LVC74A
© NXP B.V. 2007. All rights reserved.
Max
3.6
3.6
5.5
V
+125
20
10
CC
5000
Max
0.8
0.3
0.6
0.8
40
0
20
-
-
-
-
-
-
-
Unit
V
V
V
V
ns/V
ns/V
C
Unit
V
V
V
V
V
V
V
V
V
V
V
pF
5 of 16
A
A
A