LDS-L9D340G64BG2 LOGIC Devices Incorporated, LDS-L9D340G64BG2 Datasheet - Page 129

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LDS-L9D340G64BG2

Manufacturer Part Number
LDS-L9D340G64BG2
Description
4.0 Gb, Ddr3, 64 M X 64 Integrated Module Imod
Manufacturer
LOGIC Devices Incorporated
Datasheet
LOGIC Devices Incorporated
F
F
IGURE
IGURE
83 - WRITE (BL8)
84 - WRITE (BC4 M
DQS, DQS#
DQS, DQS#
Command
Comman d
Add ress
DQ BL8
Add ress
DQ BC4
CK#
CK#
CK
CK
WRITE
WRITE
Vali d
Vali d
T0
T0
NOP
T1
NOP
T1
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Notes:
Notes:
NOP
T2
NOP
T2
TO
1. DI n = data-in from column n.
ODE
2. Seven subsequent elements of data-in are applie d in the programmed order following
3. Shown for WL = 7 (AL = 0, CWL = 7).
1. NOP commands are shown for ease of illustration; other commands may be valid at these
2. The write recovery time (
3. The fixed BC4 setting is activated by MR0[ 1:0] = 10 during the WRITE command at T0.
4. DI n = data-in for column n.
5. BC4 (fixed), WL = 5, RL = 5.
PRECHARGE
DO n.
times.
write data is shown at T7.
command can be issued to the same bank.
NOP
T3
NOP
T3
WL = AL + CWL
WL = AL + CWL
R
EGISTER
NOP
T4
NOP
T4
S
T5
NOP
T5
NOP
ETTING
T6
NOP
t
T6
NOP
4.0 Gb, DDR3, 64 M x 64 Integrated Module (IMOD)
WR) is referenced from the first rising clock edge after the last
t
)
WR specifies the last burst WRITE cycle until the PRECHARGE
TO
129
PRECHARGE
T7
NOP
DI
T7
NOP
n
DI
n
n + 1
n + 1
DI
DI
n + 2
NOP
NOP
T8
n + 2
DI
T8
DI
PRELIMINARY INFORMATION
n + 3
n + 3
DI
DI
n + 4
NOP
T9
NOP
DI
T9
n + 5
DI
High Performance, Integrated Memory Module Product
Indicates a Break in
Time Scale
Indicates a Break in
Time Scale
NOP
n + 6
T10
T10
NOP
DI
n + 7
DI
NOP
T11
NOP
T11
t WR
Transitioning Data
Transitioning Data
NOP
T12
NOP
T12
t WR
NOP
Ta0
NOP
Ta0
L9D340G64BG2
Jun 08, 2010 LDS-L9D340G64BG2-B
Don ’t Care
Don ’t Care
Vali d
Vali d
Ta1
PRE
Ta1
PRE

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