cs4227 Cirrus Logic, Inc., cs4227 Datasheet - Page 15

• Manufacturer Part Number: cs4227
• Description: Six Channel, 20-bit Codec
• Manufacturer: Cirrus Logic, Inc.

2.5
There are 2 digital audio interface ports: the audio
DSP port and the auxiliary digital audio port. The
serial data is represented in 2’s complement format
with the MSB-first in all formats.
2.5.1
The serial interface clock, SCLK, is used for trans-
mitting and receiving audio data. The active edge
of SCLK is chosen by setting the DSCK bit in the
DSP Port Mode Byte (#14). SCLK can be generat-
ed by the CS4227 (master mode) or it can be input
from an external SCLK source (slave mode). Mode
selection is set with the DMS1/0 bits in the DSP
Port Mode Byte (#14). The number of SCLK cy-
cles in one system sample period is programmable
to be 32, 48, 64, or 128 by setting the DCK1/0 bits
in the DSP Port Mode Byte (#14). When SCLK is
an input, 64 SCLK’s per system sample period is
not recommended, due to potential interference ef-
fects; if possible 128 SCLK’s per sample period
should be used instead. For master mode, bursting
of a 128 Fs clock is preferrable over evenly distrib-
uted clocks.
The Left/Right clock (LRCK) is used to indicate
left and right data and the start of a new sample pe-
riod. It may be output from the CS4227, or it may
be generated from an external controller. The fre-
quency of LRCK must be equal to the system sam-
ple rate, Fs.
SDIN1, SDIN2, and SDIN3 are the data input pins,
each of which drives a pair of DACs. SDOUT1 and
SDOUT2 can carry the output data from the two
20-bit ADC’s, the mono ADC and the auxiliary dig-
ital audio port. Selection depends on the IS1/0 bits
in the ADC control byte (#11). The audio DSP port
may also be configured so that all 6 DAC’s data is
input on SDIN1, and all 3 ADC’s data is output on
SDOUT1. Table 3 outlines the serial interface
ports.
DS281PP2
Digital Interfaces
Audio DSP Serial Interface Signals
2.5.2
The audio DSP port supports 7 alternate formats,
shown in Figures 8, 9, and 10. These formats are
chosen through the DSP Port Mode Byte (#14) with
the DDF2/1/0 bits.
Formats 5 and 6 are single line data modes where
all DAC channels are combined onto a single input
and all ADC channels are combined onto a single
output. Format 6 is available in master mode only.
See Figure 10.
2.5.3
The auxiliary port provides an alternate way to in-
put digital audio signals into the CS4227. This port
consists of clock, data and left/right clock pins
named, SCLKAUX, DATAUX and LRCKAUX.
The Auxiliary Audio Port input is output on
SDOUT1 when IS is set to 1 or 2 in the ADC Con-
trol Byte. Additionally, setting IS to 2 routes the
stereo ADC outputs to SDOUT2. There is approx-
imately a two frame delay from DATAUX to
SDOUT1. When the auxiliary port is used, the fre-
quency of LRCKAUX must be equal to the system
sample rate, Fs, but no particular phase relationship
is required.
De-emphasis can be performed on input data to the
auxiliary audio port; this is controlled by the Aux-
iliary Port Control Byte (#16).
2.5.4
Input data on DATAUX is clocked into the part by
SCLKAUX using the format selected in the Auxil-
iary Port Mode Byte. The auxiliary audio port sup-
SDIN1
SDIN2
SDIN3
Audio DSP Serial Interface Formats
Auxiliary Audio Port Signals
Auxiliary Audio Port Formats
Table 3. DSP Serial Input Ports
right channel
right channel
right channel
left channel
left channel
left channel
single line
DAC Inputs
DAC #1
DAC #2
All 6 DAC channels
DAC #3
DAC #4
DAC #5
DAC #6
CS4227
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