cs4227 Cirrus Logic, Inc., cs4227 Datasheet - Page 31

• Manufacturer Part Number: cs4227
• Description: Six Channel, 20-bit Codec
• Manufacturer: Cirrus Logic, Inc.

LRCK - Left/Right Select Signal I/O
DEM - De-emphasis Control
OVL - Overload Indicator
Auxillary Digital Audio Signals
DATAUX - Auxiliary Data Input
LRCKAUX - Auxiliary Word Clock Input or Output
SCLKAUX - Auxiliary Bit Clock Input or Output
HOLD - HOLD Control
Control Port Signals
SPI/I2C - Control Port Format
SCL/CCLK - Serial Control Interface Clock
AD0/CS - Address Bit / Control Port Chip Select
AD1/CDIN - Address Bit / Serial Control Data In
SDA/CDOUT - Serial Control Data Out
DS281PP2
The Left/Right select signal. This signal has a frequency equal to the sample rate. The relationship of
LRCK to the left and right channel data depends on the selected format.
When low, DEM controls the activation of the standard 50/15 us de-emphasis filter for either 32, 44.1 or
48 kHz sample rates. This pin is enabled by the DEM2-0 bits in the Auxiliary Port Control Byte.
This pin goes high if either of the stereo audio ADCs or the mono ADC is clipping.
DATAUX is the auxiliary audio data input line, usually connected to an external digital audio source.
In auxiliary slave mode, LRCKAUX is a word clock (at Fs) from an external digital audio source. In
auxiliary master mode, LRCKAUX is a word clock output (at Fs) to clock an external digital audio
source.
In auxiliary slave mode, SCLKAUX is the serial data bit clock from an external digital audio source, used
to clock in data on DATAAUX. In auxiliary master mode, SCLKAUX is a serial data bit clock output.
This pin is sampled on the active edge of SCLKAUX. If it is high any time during the frame, DATAUX
data is ignored and the previous "good" sample is output to the serial output port.
Setting this pin low configures the control port for the SPI interface; a high state configures the control
port for the I
SCL/CCLK is the serial control interface clock, and is used to clock control bits into and out of the
CS4227.
In I
port interface on the CS4227.
In I
the control port interface.
In I
from the control port interface on the CS4227.
2
2
2
C
C
C
®
®
®
mode, AD0 is a chip address bit. In SPI software control mode, CS is used to enable the control
mode, SDA is the control data I/O line. In SPI software control mode, CDOUT is the output data
mode, AD1 is a chip address bit. In SPI software control mode, CDIN is the input data line for
2
C interface. The state of this pin sets the function of the control port input/output pins .
CS4227
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