cs4227 Cirrus Logic, Inc., cs4227 Datasheet - Page 26

• Manufacturer Part Number: cs4227
• Description: Six Channel, 20-bit Codec
• Manufacturer: Cirrus Logic, Inc.

2.23
DDF2-DDF0
DSCK
DMS1-DMS0
DCK1-DCK0*
26
DCK1
7
DSP Port Mode Byte (14)
This register defaults to 00h.
* Ignored in data formats 5 and 6.
DCK0
0 - Right justified, 20-bit
1 - Right justified, 18-bit
2 - Right justified, 16-bit
3 - Left justified, 20-bit in / 24-bit out
4 - I
5 - One Data Line Mode (Figure 10)
6 - One Data Line (Master Mode only, Figure 10)
7 - Not used
0 - Data clocked in on rising edge, out on falling edge
1 - Data clocked in on falling edge, out on rising edge
0 - Slave
1 - Master Burst - SCLKs are gated 128 Fs clocks
2 - Master Non-Burst - SCLKs are evenly distributed (No 48 Fs SCLK)
3 - not used - default to Slave
0 - 128
1 - 48 - Master Burst or Slave mode only
2 - 32 - All formats will default to 16 bits
3 - 64
Data format
Set the polarity of clocking data
Sets the mode of the port
Set number of bit clocks per Fs period
6
2
S compatible, 20-bit in / 24-bit out
DMS1
5
DMS0
4
DSCK
3
DDF2
2
DDF1
1
CS4227
DS281PP2
DDF0
0