ad5504 Analog Devices, Inc., ad5504 Datasheet - Page 4

• Manufacturer Part Number: ad5504
• Description: High Voltage, Quad Channel 12-bit Voltage Output Dac
• Manufacturer: Analog Devices, Inc.

AD5504
Parameter
POWER SUPPLIES
POWERDOWN MODE
1
2
3
4
5
6
7
AC CHARACTERISTICS
V
Table 2.
Parameter
Output Voltage Settling Time
Slew Rate
Digital-to-Analog Glitch Energy
Glitch Impulse Peak Amplitude
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DAC-to-DAC Crosstalk
AC PSRR
Peak-to-Peak Noise
Output Noise
1
2
3
Typical specifications represent average readings at 25°C, V
Valid in output voltage range of (V
Includes linearity, offset and gain drift.
Guaranteed by design and characterization. Not production tested.
V
The DAC architecture gives a fixed linear voltage output range of 0 V to 30 V if R_SEL is held high and 0V to 60V if R_SEL is held low. As the output voltage range is
limited by output amplifier compliance. V
If the die temperature exceeds 130°C the AD5504 enters a temperature power-down mode putting the DAC outputs into a high impedance state thus removing the
short circuit condition. Overheating caused by long term short circuit condition(s) is detected by an integrated thermal sensor. After power-down the AD5504 stays
powered down until a software power-up command is executed.
Guaranteed by design and characterization; not production tested.
See the Terminology section.
Temperature range is −40°C to + 105°C, typical at 25°C.
V
V
Quiescent Supply Current
(I
Logic Supply Current (I
DC PSRR
Supply current (I
Junction Temperature (T
DD
OUTX
QUIESCENT
Software powerdown mode
Thermal shutdown mode
DD
LOGIC
= 10 V to 62 V; V
refers to V
)
1, 2
OUTA
, V
DD_PWD
OUTB
, V
LOGIC
)
OUTC
LOGIC
J
)
7
or V
= 2.3 V to 5.5 V; R
)
DD
OUTD
− 0.5 V) to (AGND + 0.2 V). Outputs are unloaded.
DD
Min
should be set to at least 0.5 V higher than the maximum output voltage to ensure compliance.
Min
10
2.3
Typ
35
TBD
450
200
TBD
TBD
TBD
TBD
TBD
65
60
10
L
= 60K
DD
Max
45
= 30.5 V and V
Ω
Typ
2.5
1.5
80
23
125
; C
1
L
= 200pF; −40°C < T
Rev. Pr B | Page 4 of 15
Unit
μs
V/μs
nV-s
mV
nV-s
nV-s
nV-s
nV-s
dB
μV p-p
nV/√Hz
μV p-p
LOGIC
Max
62
5.5
TBD
50
50
150
130
= 5 V.
Conditions/Comments
¼ to ¾ scale settling to ±1 LSB,R
1 LSB change around major carry in 60 V mode
60 V mode
100Hz to 500KHz
0.1 Hz to 10 Hz
DAC code = 0x800, 10 kHz
0.1 Hz to 10 Hz
A
< +105°C, unless otherwise noted.
Unit
V
V
mA
μA
dB
μA
μA
ºC
Preliminary Technical Data
3
Test Conditions / Comments
Static conditions
V
DAC output = full-scale
T
J
IH
= T
= V
L
= 60kΩ
A
LOGIC
+ P
TOTAL
; V
IL
= DGND
× θ
JA