mg84fl54b Megawin Technology, mg84fl54b Datasheet - Page 16

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mg84fl54b

Manufacturer Part Number
mg84fl54b
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
8. Dual Data Pointer Register (DPTR)
The dual DPTR structure (see the following Figure) is a way by which the chip can specify the address of an
external data memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called DPS (AUXR.0) that allows the program code to switch between them.
DPTR Instructions
The six instructions that refer to DPTR currently selected using the DPS bit are as follows:
AUXR (Address=8EH, Auxiliary Register)
DPS: DPTR select bit, used to switch between DPTR0 and DPTR1.
The DPS bit status should be saved by software when switching between DPTR0 and DPTR1.
16
INC DPTR; Increments the data pointer by 1
MOV DPTR,#data16 ; Loads the DPTR with a 16-bit constant
MOV A,@A+DPTR ;Move code byte relative to DPTR to ACC
MOVX A,@DPTR ;Move external RAM (16-bit address) to ACC
MOVX @DPTR,A ;Move ACC to external RAM (16-bit address)
JMP @A+DPTR ;Jump indirect relative to DPTR
7
-
DPTR0
DPTR1
DPS
0
1
6
-
(83h)
DPH
DPH
BRADJ0
5
(82h)
DPL
DPL
DPTR selected
DPTR0
DPTR1
MG84FL54B Data Sheet
4
Selected by
(AUXR1, bit0)
-
DPS=0
DPS=1
T2X12
DPS
3
2
External Data Memory
-
1
-
DPS
0
MEGAWIN

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