mg84fl54b Megawin Technology, mg84fl54b Datasheet - Page 83
![no-image](/images/no-image-200.jpg)
mg84fl54b
Manufacturer Part Number
mg84fl54b
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
1.MG84FL54B.pdf
(94 pages)
- Current page: 83 of 94
- Download datasheet (2Mb)
24. Hardware Option
The device has the variety of hardware options, which can only be programmed through a universal
Writer/Programmer.
OR0 (Option Register 0)
SB:
LOCK:
{ISP_S2, ISP_S1, ISP_S0}: See the following Table.
OR1 (Option Register 1)
The IAPLB determines the IAP-memory lower boundary. Since a Flash page has 512 bytes, the IAPLB must be
an even number.
The range of the IAP-memory is determined by IAPLB and the ISP start address as listed below.
For example, if IAPLB=0x12 and the ISP start address is 0x3800, then the IAP-memory range is located at
0x1200 ~ 0x37FF.
OR2 (Option Register 2)
HWBS:
HWBS2:
MEGAWIN
ISP_S2
0 (enabled): When power-up, MCU will boot from ISP-memory if ISP-memory is configured.
1 (disabled): MCU always boots from AP-memory.
0 (enabled): In addition to power-up, the reset from RST-pin will also force MCU to boot from ISP-memory
1 (disabled): Where MCU boots from is determined by HWBS.
0 (enabled): Code dumped on a universal Writer or Programmer is scrambled for security.
1 (disabled): Not scrambled.
0 (enabled): Code is locked for security.
1 (disabled): Not locked.
ISP_S2, ISP_S1, ISP_S0
7
7
IAP lower boundary = IAPLBx256, and
IAP higher boundary = ISP start address –1.
0, 0, 0
0, 0, 1
0, 1, 0
0, 1, 1
1, 0, 0
1, 0, 1
1, 1, 0
1, 1, 1
ISP_S1
if ISP-memory is configured.
6
6
ISP_S0
5
5
ISP-memory Size
(No ISP space is
configured.)
1.5K bytes
3.5K bytes
2.5K bytes
4K bytes
3K bytes
2K bytes
1K bytes
4
4
-
MG84FL54B Data sheet
IAPLB
HWBS
3
3
ISP Start Address
HWBS2
0x3C00
0x3A00
0x3000
0x3200
0x3400
0x3600
0x3800
2
2
-
SB
1
1
LOCK
0
0
83
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