s29cd-j Meet Spansion Inc., s29cd-j Datasheet - Page 44

• Manufacturer Part Number: s29cd-j
• Description: 32/16 Megabit Cmos 2.6 Volt Or 3.3 Volt-only Simultaneous Read/write, Dual Boot, Burst Mode Flash Memory With Versatilei/o?
• Manufacturer: Meet Spansion Inc.

9.3
9.4
44
Persistent Protection Bit Lock Bit
Dynamic Protection Bits
The Persistent Protection Bit Lock Bit is a global volatile bit for all sectors. When set to “1”, it locks all PPBs;
when set to “0”, it allows the PPBs to be changed. There is only one PPB Lock Bit per device.
Notes
A Dynamic Protection Bit (DYB) is volatile and unique for each sector group and can be individually modified.
DYBs only control the protection scheme for unprotected sector groups that have their PPBs set to “0”. By
issuing the DYB Set or Clear command sequences, the DYBS are set or cleared, thus placing each sector
group in the protected or unprotected state respectively. This feature allows software to easily protect sector
groups against inadvertent changes, yet does not prevent the easy removal of protection when changes are
needed.
Notes
1. No software command sequence unlocks this bit unless the device is in the password protection
2. The PPB Lock Bit must be set only after all PPBs are configured to the desired settings.
1. The DYBs can be set or cleared as often as needed with the DYB Write Command.
2. When the parts are first shipped, the PPBs are cleared, the DYBs are cleared, and PPB Lock is
3. It is possible to have sector groups that are persistently locked with sector groups that are left in
NO
mode; only a hardware reset or a power-up clears this bit.
defaulted to power up in the cleared state – meaning the PPBs are changeable. The DYB are also
always cleared after a power-up or reset.
the dynamic state.
5th attempt?
Error
YES
S29CD-J & S29CL-J Flash Family
D a t a
Figure 9.3 PPB Erase Operation
NO
S h e e t
small bank and wait for
Either poll DQ6 in the
it to stop toggling OR
Write 0xAA to 0x555
Write 0x55 to 0x2AA
Write 0x60 to 0x555
Write 0x60 to WP
Write 0x40 to WP
Read from WP
wait 20 ms
( P r e l i m i n a r y )
DQ0 = 0?
Done
YES
S29CD-J_CL-J_00_B2 March 7, 2007
Note: Reads from the
small bank at this point
return the status of the
operation, not read array
data.