scan25100-evk National Semiconductor Corporation, scan25100-evk Datasheet - Page 4

• Manufacturer Part Number: scan25100-evk
• Description: 2457.6, 1228.8, And 614.4 Mbps Cpri Serdes With Auto Re Sync And Precision Delay Calibration Measurement
• Manufacturer: National Semiconductor Corporation

www.national.com
CONTROL PINS
Pin #
79
82
81
88
89
90
91
92
93
80
94
95
CDET
PE [0]
PE [1]
EQ [0]
EQ [1]
TXPWDNB
RXPWDNB
CALIGN_EN
RXCLKMODE
VSEL
OPMODE
RESETB
Pin Name
O, LVTTL or 1.8V
LVCMOS Internal
LVCMOS Internal
LVCMOS Internal
LVCMOS Internal
LVCMOS Internal
LVCMOS Internal
LVCMOS Internal
LVCMOS Internal
I, LVTTL or 1.8V
I, LVTTL or 1.8V
I, LVTTL or 1.8V
I, LVTTL or 1.8V
I, LVTTL or 1.8V
I, LVTTL or 1.8V
I, LVTTL or 1.8V
I, LVTTL or 1.8V
I/O, Type
LVCMOS
pull down
pull down
pull down
pull down
pull down
pull down
pull down
pull down
Comma Detect.
0 = no comma yet detected in the incoming serial stream or receiver PLL not locked.
1 = the receiver PLL is locked and a positive or negative comma bit sequence detected
in the incoming bit stream. The serial to parallel converter is aligned to the proper 10-
bit word boundary when comma alignment is enabled (CALIGN_EN = 1).
Transmitter de-emphasis configuration.
Pulling both pins low enables MDIO control, default is no de-emphasis.
PE1
0
0
1
1
Receive input equalization configuration.
Pulling both pins low enables MDIO control, default is no receive equalization.
EQ1
0
0
1
1
Power down control signals.
TXPWDNB
0 = Transmitter is powered down and DOUT± pins are high impedance.
1 = Transmitter is powered up.
RXPWDNB
0 = Receiver is powered down and ROUT [9:0] as well as LOS, LOCKB, CDET,
RXCLK, and SYSCLK are high impedance.
1 = Receiver is powered up.
Comma alignment enable.
0 = comma alignment circuitry disabled.
1 = comma detect and alignment circuitry enabled. Receiver aligns 10-bit data to
incoming comma character and flags comma detect through CDET pin.
Receiver recovered clock mode
0 = Write mode. RXCLK pin is a recovered clock output.
(RXCLK = output pin)
1 = Read mode. RXCLK pin is the ROUT [9:0] bus read input strobe.
(RXCLK = input pin)
Selects whether single-ended data and control pins are 3.3V LVTTL or 1.8V LVCMOS.
0 = 1.8V LVCMOS. Tie VSEL to ground and power IOVDD at 1.8 V.
1 = 3.3V LVTTL. Tie VSEL to IOVDD supply and power IOVDD at 3.3 V.
Selects SerDes mode.
0 = Base station mode
1 = Reserved for future use
Hardware SerDes reset. Resets PLLs and MDIO registers.
0 = Hardware SerDes reset
1 = Normal operation
4
PE0
0
1
0
1
EQ0
0
1
0
1
Description
No de-emphasis
Low de-emphasis
Medium de-emphasis
Maximum de-emphasis
No receive equalization
Low receive equalization
Medium receive equalization
Maximum receive equalization