ics8430-111 Integrated Device Technology, ics8430-111 Datasheet - Page 10
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ics8430-111
Manufacturer Part Number
ics8430-111
Description
Programmable Low-jitter Lvpecl Or Lvcmos-input Lvpecl-output 2-output 700-mhz Clock Synthesizer
Manufacturer
Integrated Device Technology
Datasheet
1.ICS8430-111.pdf
(18 pages)
W
IDT
Figure 3 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
ICS8430-111
700MHZ, LOW JITTER, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
IRING THE
™
/ ICS
™
3.3V LVPECL FREQUENCY SYNTHESIZER
D
IFFERENTIAL
I
NPUT TO
F
IGURE
Single Ended Clock Input
A
CCEPT
3. S
INGLE
S
INGLE
E
C1
0.1u
NDED
V_REF
CC
/2 is
E
NDED
S
IGNAL
10
L
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
D
1K
EVELS
R1
1K
R2
RIVING
VCC
CLK
nCLK
D
IFFERENTIAL
I
NPUT
ICS8430DY-111 REV. F JANUARY 29, 2007
CC
= 3.3V, V_REF should be 1.25V
PRELIMINARY