ad80164absvz Analog Devices, Inc., ad80164absvz Datasheet - Page 18

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ad80164absvz

Manufacturer Part Number
ad80164absvz
Description
Dual, 12-/14-/16-bit,1 Gsps Digital-to-analog Converters
Manufacturer
Analog Devices, Inc.
Datasheet
AD9776A/AD9778A/AD9779A
Figure 31. AD9779A ACLR for First Adjacent Band WCDMA, 4× Interpolation,
f
Figure 30. AD9779A Noise Spectral Density vs. f
DATA
= 122.88 MSPS, On-Chip Modulation Translates Baseband Signal to IF
–150
–154
–158
–162
–166
–170
–55
–60
–65
–70
–75
–80
–85
–90
0
0
20
40
f
with a Single-Tone Input at −6 dBFS
DAC
20
60
= 200MSPS
0dBFS, PLL ENABLED
80
100
40
f
f
OUT
OUT
120
–6dBFS, PLL DISABLED
(MHz)
(MHz)
f
140
DAC
0dBFS, PLL DISABLED
f
60
DAC
= 800MSPS
160
–3dBFS, PLL DISABLED
DAC
= 400MSPS
180
over Output Frequency
200
80
220
240
100
260
Rev. 0 | Page 18 of 68
Figure 33. AD9779A ACLR for Third Adjacent Band WCDMA, 4× Interpolation,
f
DATA
Interpolation, f
Figure 32. AD9779A ACLR for Second Adjacent Band WCDMA, 4×
= 122.88 MSPS, On-Chip Modulation Translates Baseband Signal to IF
–55
–60
–65
–70
–75
–80
–85
–90
–55
–60
–65
–70
–75
–80
–85
–90
0
0
20
20
40
40
0dBFS, PLL ENABLED
DATA
–3dBFS, PLL DISABLED
–3dBFS, PLL DISABLED
60
60
= 122.88 MSPS; On-Chip Modulation Translates
Baseband Signal to IF
80
80
100
100
f
f
OUT
OUT
120
120
(MHz)
(MHz)
140
140
0dBFS, PLL ENABLED
–6dBFS, PLL DISABLED
–6dBFS, PLL DISABLED
160
160
0dBFS, PLL DISABLED
0dBFS, PLL DISABLED
180
180
200
200
220
220
240
240
2
260
60

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