lmk03000c National Semiconductor Corporation, lmk03000c Datasheet - Page 17

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lmk03000c

Manufacturer Part Number
lmk03000c
Description
Precision Clock Conditioner With Integrated Vco
Manufacturer
National Semiconductor Corporation
Datasheet
2.5.3 VCO_R4_LF[2:0] -- Value for Internal Loop Filter Resistor R4
These bits control the R4 resistor value in the internal loop filter. The recommended setting for VCO_R4_LF[2:0] = 0 for optimum
phase noise and jitter.
2.5.4 OSCin_FREQ[7:0] -- Oscillator Input Calibration Adjustment
These bits are to be programmed to the OSCin frequency. If the OSCin frequency is not an integral multiple of 1 MHz, then round
to the closest value.
2.6 REGISTER R14
2.6.1 PLL_R[11:0] -- R Divider Value
These bits program the PLL R Divider and are programmed in binary fashion. Any changes to PLL_R require R15 to be programmed
again to active the frequency calibration routine.
0
0
0
0
1
.
.
0
0
0
0
1
.
.
0
0
0
0
1
.
.
0
0
0
0
1
.
.
OSCin_FREQ[7:0]
VCO_R4_LF[2:0]
201 to 255
0
0
0
0
1
.
.
5 to 7
200
10
...
...
0
1
2
3
4
1
2
PLL_R[11:0]
0
0
0
0
1
.
.
0
0
0
0
1
.
.
0
0
0
0
1
.
.
17
0
0
0
1
1
.
.
Low (~200 Ω) (default)
OSCin Frequency
10 MHz (default)
R4 Value (kΩ)
0
0
0
0
1
.
.
200 MHz
Invalid
1 MHz
2 MHz
Invalid
10
20
30
40
...
...
0
0
1
1
1
.
.
0
1
0
0
1
.
.
PLL R Divide Value
10 (default)
Invalid
4095
...
...
1
2
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