max9257agcm/v+ Maxim Integrated Products, Inc., max9257agcm/v+ Datasheet - Page 30

• Manufacturer Part Number: max9257agcm/v+
• Description: Fully Programmable Serializer/deserializer With Uart/i2c Control Channel
• Manufacturer: Maxim Integrated Products, Inc.

In the control channel phase, there are two modes: base
and bypass. In base mode, ECU always communicates
using the MAX9257A/MAX9258A UART protocol and
com munication with a peripheral device is performed
in I
the MAX9257A or the MAX9258A get converted to I
and passed to the peripheral device. Similarly, I
packets from the peripheral device get converted to
UART pack ets in the reverse direction. ECU can disable
communi cation to the peripheral device by writing a 0 to
INTEN (REG8[6] in the MAX9257A and REG7[6] in the
MAX9258A). Base mode is the default mode. Bypass
mode is entered by writing a 0 to INTMODE and 1 to
INTEN
activity from ECU in the control channel for the duration of
CTO. When CTO times out, INTEN reverts back to 0 and
the devices revert back to base mode. To permanently
stay in bypass mode, ECU can lock the CTO timer or
program CTO to be longer than ETO and STO.
The devices feature three different timers. The start time-
out (STO) and end timeout (ETO) control the duration of
the control channel. The come-back timeout (CTO) con-
trols the duration of bypass mode.
Table 23. Selection of Base Mode or
Bypass Mode
MAX9257A REG8[6],
MAX9258A REG7[6]
2
C by the MAX9257A. Packets not addressed to
INTEN
(Table
Base Mode and Bypass Mode (Basics)
0
1
1
23). Bypass mode is exited if there is no
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Fully Programmable Serializer/Deserializer
MAX9257A REG8[7],
MAX9258A REG7[7]
INTMODE
X
1
0
Base mode, com-
munication
with peripheral is
not enabled
Base mode,
communication
with peripheral is
enabled (I 2 C)
Bypass mode,
communication
with MAX9257A/
MAX9258A is not
enabled, commu-
nication
with peripheral is
enabled (UART)
MODE
with UART/I
Timers
2
2
C
C
The STO (start timeout) timer closes the control chan-
nel if the ECU does not start using the control channel
within the STO timeout period. The STO timer is config-
ured by register REG2 for both the MAX9257A and the
MAX9258A. The four bits of REG2[7:4] select the divide
ratio (STODIV) for the STO clock as a function of the pixel
clock
counter bits REG2[3:0] that increment once every STO
clock period. Write to REG2[3:0] to determine the counter
end time. The STO counter counts to the programmed
STOCNT + 1. The ECU must begin communicating
before STO times out, otherwise, the control channel
closes
For example:
If the pixel clock frequency is set to 16MHz, STODIV is
set to 1010 (STODIV = 1024), and STOCNT is set to 1001
(STOCNT = 9), the STO timer counts with 15.625kHz STO
clock (16MHz/1024) internally until it reaches 10 and
timer expires. The t
The default value for STODIV is 1024 while the default
value for STOCNT is 0. That means the STO timeout
period is equal 1024 pixel clock cycles. Activity from the
ECU on the control channel shuts off the STO timer and
starts the ETO timer.
Table 24. STO Clock Divide Ratio
MAX9257A/MAX9258A
(Table
(Figure
t
REG2[7:4]
STO
00XX
2
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
24). The timeout period is determined by
=
C Control Channel
22). The STO timeout period is given by:



f
CLK
STO
1



×
is equal to t
STODIV (STOCNT 1)
×
T
x 1024 x 10 = 640Fs.
STODIV
16,384
32,768
1024
2048
4096
8192
128
256
512
16
16
32
64
+
STO Timer