max9257agcm/v+ Maxim Integrated Products, Inc., max9257agcm/v+ Datasheet - Page 36

• Manufacturer Part Number: max9257agcm/v+
• Description: Fully Programmable Serializer/deserializer With Uart/i2c Control Channel
• Manufacturer: Maxim Integrated Products, Inc.

Once serialization is enabled, the programming of regis-
ters (including the control channel overhead time) must
be completed within the vertical blanking time to avoid
loss of video data. VSYNC can deassert while control
channel remains open after eight pixel clock cycles.
The control channel phase begins on the transition of
the programmed active edge of VSYNC_IN. In video
applications, the VSYNC signal of the peripheral device
is connected to VSYNC_IN on the MAX9257A. In other
applications, a different signal can be used to trigger
the control channel phase. When the devices detect the
VSYNC_IN transition, the LVDS video phase disables and
the control channel phase is enabled.
The control channel operates in two modes: base and
bypass. In base mode, the ECU issues UART com-
mands in a specified format to program the MAX9257A/
MAX9258A registers. GPIO on the MAX9257A are also
programmed in base mode. UART commands are trans-
lated to I
to the MAX9257A when not addressed to either the
MAX9257A or the MAX9258A.
In bypass mode, programming of the MAX9257A/
MAX9258A registers are temporarily or permanent-
ly blocked depending on the programmed value of
CTO. Blocking prevents unintentional programming of
the MAX9257A/MAX9258A registers when the ECU
communi cates with the peripheral using a UART protocol
differ ent than the one specified to program the devices.
When the control channel is open, the MAX9258A con-
tinues outputting the pixel clock while HSYNC and video
data are held at the last value. If spread is enabled on the
MAX9258A, the pixel clock is spread.
Control channel overhead consists of lock frame, short
synchronization sequence, and error frame. The lock
frame is transmitted between the MAX9257A and the
MAX9258A without action by the ECU. The error frame
is only sent in response to end frame. When MAX9257A
spread spectrum is enabled, the control channel is
entered after spread reaches center frequency. The over-
head from VSYNC falling edge to control channel enable
accounts for a maximum of 1400 pixel clock cycles.
Base mode allows the ECU to communicate with the
devices in UART and a peripheral device in I
programming of the peripheral device is not possible in
base mode. UART packets from the ECU need to follow
a certain protocol to program the MAX9257A and the
2
C and output to peripheral devices connected
���������������������������������������������������������������� Maxim Integrated Products 36
Fully Programmable Serializer/Deserializer
Control Channel Overhead
Base Mode (Details)
with UART/I
2
C. UART
MAX9258A
to the MAX9257A/MAX9258A get converted to I
the MAX9257A and pass to the peripheral device. The
MAX9257A receives I
device and converts them to UART packets to send back
to the ECU. To disable communication to the peripheral
device, write a 0 to INTEN (REG8[6] in the MAX9257A
and REG7[6] in the MAX9258A).
In base mode, the STO/ETO timers and the EF command
are used to control the duration of the control channel.
STO and ETO count up and expire when they reach their
programmed value. STO and ETO are not enabled at
the same time. STO is enabled after CCEN goes high. If
there is activity from the ECU before STO times out, STO
is dis abled and ETO is enabled. The ECU must begin
a trans action within an STO timeout or else the channel
closes. The ECU can close the channel by allowing ETO
to time-out. Activity from the ECU resets the ETO timer.
Another way to close the control channel is by send-
ing an end frame (EF). EF closes the channel within 2
to 3 bit times after being received by the MAX9257A/
MAX9258A. The default value of EF is 0xFF, but can be
programmed to any other value besides the MAX9257A
and the MAX9258A device addresses. The control chan-
nel must be closed with EF for control channel errors to
be reported.
Program STO to be longer than the time the ECU takes to
respond to opening of channel. Program ETO to be lon-
ger than the time the ECU pauses between transac tions.
As long as the ECU performs transactions, ETO is reset
and the channel stays open.
The ECU must wait 14 or more bit times before address-
ing another device during the same control channel
ses sion. Failure to wait 14 bit times may result in the
packet boundary not being reset. Internal handshaking
opera tions are automatically performed after the channel
is closed and before the video phase begins.
The UART-to-I
packets issued by the ECU and converts them to an I
master protocol when in base mode. A slave can use an
ACK or NACK to indicate a busy or wait state, but cannot
hold SCL low to indicate a wait state. Multiple slaves are
supported. The UART-to-I
22 UART bit times and needs to be taken into account
when setting the ETO and STO timeout periods for read
commands. UART-to-I
UART format to standard I
MAX9257A/MAX9258A
(Figures 28
2
2
C Control Channel
C converter accepts UART read or write
2
2
C packets from the peripheral
C converter converts standard
and 29). Packets not addressed
2
C conversion delay is less than
2
C format
UART-to-I2C Converter
(Figure
25). This
2
C by
2
C