pcf2123 NXP Semiconductors, pcf2123 Datasheet - Page 28

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pcf2123

Manufacturer Part Number
pcf2123
Description
Spi Real Time Clock/calendar
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCF2123_1
Product data sheet
9.10.1 CLKOE pin
9.10 Clock output
9.11 Offset register
A programmable square wave is available at pin CLKOUT. Operation is controlled by the
COF[2:0] bits in the register Timer_clkout. Frequencies of 32.768 kHz (default) down to
1 Hz can be generated for use as a system clock, microcontroller clock, input to a charge
pump, or for calibration of the oscillator.
Pin CLKOUT is an open-drain output and enabled at power-on. When disabled the output
is high-impedance.
The duty cycle of the selected clock is not controlled. However, due to the nature of the
clock generation, all will be 50 : 50 except the 32.768 kHz frequencies.
The STOP bit function can also affect the CLKOUT signal, depending on the selected
frequency. When the STOP bit is set to logic 1, the CLKOUT pin will generate a
continuous LOW for those frequencies that can be stopped. For more details of the STOP
bit function see
Table 35.
[1]
[2]
The CLKOE pin can be used to block the CLKOUT function and force the CLKOUT pin to
an high-impedance state. The effect is the same as setting COF[2:0] = 111.
The PCF2123 incorporates an offset register (address 0Dh) which can be used to
implement several functions, such as:
The offset is made once every two hours in the normal mode, or once every hour in the
course mode. Each LSB will introduce an offset of 2.17 ppm for normal mode and
4.34 ppm for course mode. The values of 2.17 ppm and 4.34 ppm are based on a nominal
32.768 kHz clock. The offset value is coded in two’s complement giving a range of
+63 LSB to 64 LSB.
Bits COF[2:0]
000
001
010
011
100
101
110
111
Duty cycle definition: % HIGH-level time : % LOW-level time.
1 Hz clock pulses will be affected by offset correction pulses.
Ageing adjustment
Temperature compensation
Accuracy tuning
CLKOUT frequency selection
Section
CLKOUT frequency (Hz) Typical duty cycle
32768
16384
8192
4096
2048
1024
1
CLKOUT = high-Z
[2]
Rev. 01 — 19 November 2008
9.13.
60 : 40 to 40 : 60
50 : 50
50 : 50
50 : 50
50 : 50
50 : 50
50 : 50
-
[1]
SPI Real time clock/calendar
Effect of STOP bit
no effect
no effect
no effect
CLKOUT = LOW
CLKOUT = LOW
CLKOUT = LOW
CLKOUT = LOW
-
PCF2123
© NXP B.V. 2008. All rights reserved.
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