m48t37v STMicroelectronics, m48t37v Datasheet - Page 16

• Manufacturer Part Number: m48t37v
• Description: 5.0 Or 3.3v, 256 Kbit 32 Kbit X 8 Timekeeper Sram
• Manufacturer: STMicroelectronics

Note:
3.6
Note:
Note:
16/29
each of the 31 increments in the Calibration Byte would represent +10.7 or –5.35 seconds
per month which corresponds to a total range of +5.5 or –2.75 minutes per month.
Two methods are available for ascertaining how much calibration a given M48T37Y/V may
require. The first involves simply setting the clock, letting it run for a month and comparing it
to a known accurate reference (like WWW broadcasts). While that may seem crude, it
allows the designer to give the end user the ability to calibrate his clock as his environment
may require, even after the final product is packaged in a non-user serviceable enclosure.
All the designer has to do is provide a simple utility that accesses the Calibration Byte.
The second approach is better suited to a manufacturing environment, and involves the use
of the IRQ/FT pin. The pin will toggle at 512 Hz when the Stop Bit (ST, D7 of 7FF9h) is '0'
the Frequency Test Bit (FT, D6 of 7FFCh) is '1,' the Alarm Flag Enable Bit (AFE, D7 of
7FF6h) is '0,' and the Watchdog Steering Bit (WDS, D7 of 7FF7h) is '1' or the Watchdog
Register is reset (7FF7h=0).
Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at
the test temperature. For example, a reading of 512.01024 Hz would indicate a +20 PPM
oscillator frequency error, requiring a –10(WR001010) to be loaded into the Calibration Byte
for correction.
Setting or changing the Calibration Byte does not affect the Frequency Test output
frequency.
The IRQ/FT pin is an open drain output which requires a pull-up resistor for proper
operation. A 500-10k resistor is recommended in order to control the rise time. The FT Bit
is cleared on power-down.
For more information on calibration, see the Application Note AN934, “TIMEKEEPER
Calibration.”
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the eight-bit
Watchdog Register, address 7FF7h. The five bits (BMB4-BMB0) that store a binary
multiplier and the two lower order bits (RB1-RB0) select the resolution, where 00 =
second, 01 =
then determined to be the multiplication of the five-bit multiplier value with the resolution.
(For example: writing 00001110 in the Watchdog Register = 3x1, or 3 seconds).
Accuracy of timer is within ± the selected resolution.
If the processor does not reset the timer within the specified period, the M48T37Y/V sets the
Watchdog Flag (WDF) and generates a watchdog interrupt or a microprocessor reset. WDF
is reset by reading the Flags Register (Address 7FF0h).
User must transition address (or toggle chip enable) to see Flag Bit change.
Reset will not occur unless the addresses are stable at the flag location for at least 15ns
while the device is in the READ Mode as shown in
The most significant bit of the Watchdog Register is the Watchdog Steering Bit. When set to
a '0,' the watchdog will activate the IRQ/FT pin when timed-out. When WDS is set to a '1,'
the watchdog will output a negative pulse on the RST pin for a duration of t
Watchdog Register, the FT Bit, AFE Bit, and ABE Bit will reset to a '0' at the end of a
Watchdog time-out when the WDS bit is set to a '1.'
1
/
4
second, 10 = 1 second, and 11 = 4 seconds. The amount of time-out is
Figure 9 on page
19.
REC
. The
1
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