adc08d1010diyb National Semiconductor Corporation, adc08d1010diyb Datasheet - Page 4

• Manufacturer Part Number: adc08d1010diyb
• Description: High Performance, Low Power, Dual 8-bit, 1 Gsps A/d Converter
• Manufacturer: National Semiconductor Corporation

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Pin Functions
Pin No.
Pin Descriptions and Equivalent Circuits
15
26
30
29
14
3
4
OutEdge / DDR /
OutV / SCLK
DCLK_RST
FSR/ECE
Symbol
SDATA
PDQ
CAL
PD
Equivalent Circuit
4
Output Voltage Amplitude and Serial Interface Clock. Tie this pin
high for normal differential DCLK and data amplitude. Ground this
pin for a reduced differential output amplitude and reduced power
consumption. See Section 1.1.6. When the extended control mode
is enabled, this pin functions as the SCLK input which clocks in the
serial data. See Section 1.2 for details on the extended control
mode. See Section 1.3 for description of the serial interface.
DCLK Edge Select, Double Data Rate Enable and Serial Data
Input. This input sets the output edge of DCLK+ at which the output
data transitions. (See Section 1.1.5.2). When this pin is floating or
connected to 1/2 the supply voltage, DDR clocking is enabled.
When the extended control mode is enabled, this pin functions as
the SDATA input. See Section 1.2 for details on the extended
control mode. See Section 1.3 for description of the serial
interface.
DCLK Reset. A positive pulse on this pin is used to reset and
synchronize the DCLK outs of multiple converters. See Section 1.5
for detailed description.
Power Down. A logic high on the PD pin puts the entire device into
the Power Down Mode.
Calibration Cycle Initiate. A minimum 80 input clock cycles logic
low followed by a minimum of 80 input clock cycles high on this
pin initiates the self calibration sequence. See Section 2.4.2 for an
overview of self-calibration and Section 2.4.2.2 for a description of
on-command calibration.
Power Down Q. A logic high on the PDQ pin puts only the "Q" ADC
into the Power Down mode.
Full Scale Range Select and Extended Control Enable. In non-
extended control mode, a logic low on this pin sets the full-scale
differential input range to 650 mV
the full-scale differential input range to 870 mV
1.1.4. To enable the extended control mode, whereby the serial
interface and control registers are employed, allow this pin to float
or connect it to a voltage equal to V
information on the extended control mode.
Description
P-P
A
. A logic high on this pin sets
/2. See Section 1.2 for
P-P
. See Section